build/external/patches/dpdk_20.02/0007-net-iavf-flexible-Rx-descriptor-definitions.patch

   1 From a7cbf4fabd46b0d02b651f5defac754e56e11e0e Mon Sep 17 00:00:00 2001
   2 From: Leyi Rong <leyi.rong@intel.com>
   3 Date: Wed, 8 Apr 2020 14:22:00 +0800
   4 Subject: [DPDK 07/17] net/iavf: flexible Rx descriptor definitions
   5
   6 Add definitions for flexible Rx descriptor structures and macros.
   7
   8 Signed-off-by: Leyi Rong <leyi.rong@intel.com>
   9 ---
  10  drivers/net/iavf/iavf_rxtx.h | 200 +++++++++++++++++++++++++++++++++++
  11  1 file changed, 200 insertions(+)
  12
  13 diff --git a/drivers/net/iavf/iavf_rxtx.h b/drivers/net/iavf/iavf_rxtx.h
  14 index 09b5bd99e..5e309631e 100644
  15 --- a/drivers/net/iavf/iavf_rxtx.h
  16 +++ b/drivers/net/iavf/iavf_rxtx.h
  17 @@ -157,6 +157,206 @@ union iavf_tx_offload {
  18         };
  19  };
  20
  21 +/* Rx Flex Descriptors
  22 + * These descriptors are used instead of the legacy version descriptors
  23 + */
  24 +union iavf_16b_rx_flex_desc {
  25 +       struct {
  26 +               __le64 pkt_addr; /* Packet buffer address */
  27 +               __le64 hdr_addr; /* Header buffer address */
  28 +                                /* bit 0 of hdr_addr is DD bit */
  29 +       } read;
  30 +       struct {
  31 +               /* Qword 0 */
  32 +               u8 rxdid; /* descriptor builder profile ID */
  33 +               u8 mir_id_umb_cast; /* mirror=[5:0], umb=[7:6] */
  34 +               __le16 ptype_flex_flags0; /* ptype=[9:0], ff0=[15:10] */
  35 +               __le16 pkt_len; /* [15:14] are reserved */
  36 +               __le16 hdr_len_sph_flex_flags1; /* header=[10:0] */
  37 +                                               /* sph=[11:11] */
  38 +                                               /* ff1/ext=[15:12] */
  39 +
  40 +               /* Qword 1 */
  41 +               __le16 status_error0;
  42 +               __le16 l2tag1;
  43 +               __le16 flex_meta0;
  44 +               __le16 flex_meta1;
  45 +       } wb; /* writeback */
  46 +};
  47 +
  48 +union iavf_32b_rx_flex_desc {
  49 +       struct {
  50 +               __le64 pkt_addr; /* Packet buffer address */
  51 +               __le64 hdr_addr; /* Header buffer address */
  52 +                                /* bit 0 of hdr_addr is DD bit */
  53 +               __le64 rsvd1;
  54 +               __le64 rsvd2;
  55 +       } read;
  56 +       struct {
  57 +               /* Qword 0 */
  58 +               u8 rxdid; /* descriptor builder profile ID */
  59 +               u8 mir_id_umb_cast; /* mirror=[5:0], umb=[7:6] */
  60 +               __le16 ptype_flex_flags0; /* ptype=[9:0], ff0=[15:10] */
  61 +               __le16 pkt_len; /* [15:14] are reserved */
  62 +               __le16 hdr_len_sph_flex_flags1; /* header=[10:0] */
  63 +                                               /* sph=[11:11] */
  64 +                                               /* ff1/ext=[15:12] */
  65 +
  66 +               /* Qword 1 */
  67 +               __le16 status_error0;
  68 +               __le16 l2tag1;
  69 +               __le16 flex_meta0;
  70 +               __le16 flex_meta1;
  71 +
  72 +               /* Qword 2 */
  73 +               __le16 status_error1;
  74 +               u8 flex_flags2;
  75 +               u8 time_stamp_low;
  76 +               __le16 l2tag2_1st;
  77 +               __le16 l2tag2_2nd;
  78 +
  79 +               /* Qword 3 */
  80 +               __le16 flex_meta2;
  81 +               __le16 flex_meta3;
  82 +               union {
  83 +                       struct {
  84 +                               __le16 flex_meta4;
  85 +                               __le16 flex_meta5;
  86 +                       } flex;
  87 +                       __le32 ts_high;
  88 +               } flex_ts;
  89 +       } wb; /* writeback */
  90 +};
  91 +
  92 +/* Rx Flex Descriptor for Comms Package Profile
  93 + * RxDID Profile ID 16-21
  94 + * Flex-field 0: RSS hash lower 16-bits
  95 + * Flex-field 1: RSS hash upper 16-bits
  96 + * Flex-field 2: Flow ID lower 16-bits
  97 + * Flex-field 3: Flow ID upper 16-bits
  98 + * Flex-field 4: AUX0
  99 + * Flex-field 5: AUX1
 100 + */
 101 +struct iavf_32b_rx_flex_desc_comms {
 102 +       /* Qword 0 */
 103 +       u8 rxdid;
 104 +       u8 mir_id_umb_cast;
 105 +       __le16 ptype_flexi_flags0;
 106 +       __le16 pkt_len;
 107 +       __le16 hdr_len_sph_flex_flags1;
 108 +
 109 +       /* Qword 1 */
 110 +       __le16 status_error0;
 111 +       __le16 l2tag1;
 112 +       __le32 rss_hash;
 113 +
 114 +       /* Qword 2 */
 115 +       __le16 status_error1;
 116 +       u8 flexi_flags2;
 117 +       u8 ts_low;
 118 +       __le16 l2tag2_1st;
 119 +       __le16 l2tag2_2nd;
 120 +
 121 +       /* Qword 3 */
 122 +       __le32 flow_id;
 123 +       union {
 124 +               struct {
 125 +                       __le16 aux0;
 126 +                       __le16 aux1;
 127 +               } flex;
 128 +               __le32 ts_high;
 129 +       } flex_ts;
 130 +};
 131 +
 132 +/* Rx Flex Descriptor for Comms Package Profile
 133 + * RxDID Profile ID 22-23 (swap Hash and FlowID)
 134 + * Flex-field 0: Flow ID lower 16-bits
 135 + * Flex-field 1: Flow ID upper 16-bits
 136 + * Flex-field 2: RSS hash lower 16-bits
 137 + * Flex-field 3: RSS hash upper 16-bits
 138 + * Flex-field 4: AUX0
 139 + * Flex-field 5: AUX1
 140 + */
 141 +struct iavf_32b_rx_flex_desc_comms_ovs {
 142 +       /* Qword 0 */
 143 +       u8 rxdid;
 144 +       u8 mir_id_umb_cast;
 145 +       __le16 ptype_flexi_flags0;
 146 +       __le16 pkt_len;
 147 +       __le16 hdr_len_sph_flex_flags1;
 148 +
 149 +       /* Qword 1 */
 150 +       __le16 status_error0;
 151 +       __le16 l2tag1;
 152 +       __le32 flow_id;
 153 +
 154 +       /* Qword 2 */
 155 +       __le16 status_error1;
 156 +       u8 flexi_flags2;
 157 +       u8 ts_low;
 158 +       __le16 l2tag2_1st;
 159 +       __le16 l2tag2_2nd;
 160 +
 161 +       /* Qword 3 */
 162 +       __le32 rss_hash;
 163 +       union {
 164 +               struct {
 165 +                       __le16 aux0;
 166 +                       __le16 aux1;
 167 +               } flex;
 168 +               __le32 ts_high;
 169 +       } flex_ts;
 170 +};
 171 +
 172 +/* Receive Flex Descriptor profile IDs: There are a total
 173 + * of 64 profiles where profile IDs 0/1 are for legacy; and
 174 + * profiles 2-63 are flex profiles that can be programmed
 175 + * with a specific metadata (profile 7 reserved for HW)
 176 + */
 177 +enum iavf_rxdid {
 178 +       IAVF_RXDID_LEGACY_0             = 0,
 179 +       IAVF_RXDID_LEGACY_1             = 1,
 180 +       IAVF_RXDID_FLEX_NIC             = 2,
 181 +       IAVF_RXDID_FLEX_NIC_2           = 6,
 182 +       IAVF_RXDID_HW                   = 7,
 183 +       IAVF_RXDID_COMMS_GENERIC        = 16,
 184 +       IAVF_RXDID_COMMS_AUX_VLAN       = 17,
 185 +       IAVF_RXDID_COMMS_AUX_IPV4       = 18,
 186 +       IAVF_RXDID_COMMS_AUX_IPV6       = 19,
 187 +       IAVF_RXDID_COMMS_AUX_IPV6_FLOW  = 20,
 188 +       IAVF_RXDID_COMMS_AUX_TCP        = 21,
 189 +       IAVF_RXDID_COMMS_OVS_1          = 22,
 190 +       IAVF_RXDID_COMMS_OVS_2          = 23,
 191 +       IAVF_RXDID_LAST                 = 63,
 192 +};
 193 +
 194 +enum iavf_rx_flex_desc_status_error_0_bits {
 195 +       /* Note: These are predefined bit offsets */
 196 +       IAVF_RX_FLEX_DESC_STATUS0_DD_S = 0,
 197 +       IAVF_RX_FLEX_DESC_STATUS0_EOF_S,
 198 +       IAVF_RX_FLEX_DESC_STATUS0_HBO_S,
 199 +       IAVF_RX_FLEX_DESC_STATUS0_L3L4P_S,
 200 +       IAVF_RX_FLEX_DESC_STATUS0_XSUM_IPE_S,
 201 +       IAVF_RX_FLEX_DESC_STATUS0_XSUM_L4E_S,
 202 +       IAVF_RX_FLEX_DESC_STATUS0_XSUM_EIPE_S,
 203 +       IAVF_RX_FLEX_DESC_STATUS0_XSUM_EUDPE_S,
 204 +       IAVF_RX_FLEX_DESC_STATUS0_LPBK_S,
 205 +       IAVF_RX_FLEX_DESC_STATUS0_IPV6EXADD_S,
 206 +       IAVF_RX_FLEX_DESC_STATUS0_RXE_S,
 207 +       IAVF_RX_FLEX_DESC_STATUS0_CRCP_S,
 208 +       IAVF_RX_FLEX_DESC_STATUS0_RSS_VALID_S,
 209 +       IAVF_RX_FLEX_DESC_STATUS0_L2TAG1P_S,
 210 +       IAVF_RX_FLEX_DESC_STATUS0_XTRMD0_VALID_S,
 211 +       IAVF_RX_FLEX_DESC_STATUS0_XTRMD1_VALID_S,
 212 +       IAVF_RX_FLEX_DESC_STATUS0_LAST /* this entry must be last!!! */
 213 +};
 214 +
 215 +/* for iavf_32b_rx_flex_desc.ptype_flex_flags0 member */
 216 +#define IAVF_RX_FLEX_DESC_PTYPE_M      (0x3FF) /* 10-bits */
 217 +
 218 +/* for iavf_32b_rx_flex_desc.pkt_len member */
 219 +#define IAVF_RX_FLX_DESC_PKT_LEN_M     (0x3FFF) /* 14-bits */
 220 +
 221  int iavf_dev_rx_queue_setup(struct rte_eth_dev *dev,
 222                            uint16_t queue_idx,
 223                            uint16_t nb_desc,
 224 --
 225 2.17.1
 226