extras/deprecated/perfmon/perfmon_intel_skl.c

   1
   2 #include <perfmon/perfmon_intel.h>
   3
   4 static perfmon_intel_pmc_cpu_model_t cpu_model_table[] = {
   5   {0x4E, 0x00, 0},
   6   {0x5E, 0x00, 0},
   7   {0x8E, 0x00, 0},
   8   {0x9E, 0x00, 0},
   9
  10 };
  11
  12 static perfmon_intel_pmc_event_t event_table[] = {
  13   {
  14    .event_code = {0x00},
  15    .umask = 0x01,
  16    .event_name = "inst_retired.any",
  17    },
  18   {
  19    .event_code = {0x00},
  20    .umask = 0x02,
  21    .event_name = "cpu_clk_unhalted.thread",
  22    },
  23   {
  24    .event_code = {0x00},
  25    .umask = 0x02,
  26    .event_name = "cpu_clk_unhalted.thread_any",
  27    },
  28   {
  29    .event_code = {0x00},
  30    .umask = 0x03,
  31    .event_name = "cpu_clk_unhalted.ref_tsc",
  32    },
  33   {
  34    .event_code = {0x03},
  35    .umask = 0x02,
  36    .event_name = "ld_blocks.store_forward",
  37    },
  38   {
  39    .event_code = {0x03},
  40    .umask = 0x08,
  41    .event_name = "ld_blocks.no_sr",
  42    },
  43   {
  44    .event_code = {0x07},
  45    .umask = 0x01,
  46    .event_name = "ld_blocks_partial.address_alias",
  47    },
  48   {
  49    .event_code = {0x08},
  50    .umask = 0x01,
  51    .event_name = "dtlb_load_misses.miss_causes_a_walk",
  52    },
  53   {
  54    .event_code = {0x08},
  55    .umask = 0x02,
  56    .event_name = "dtlb_load_misses.walk_completed_4k",
  57    },
  58   {
  59    .event_code = {0x08},
  60    .umask = 0x04,
  61    .event_name = "dtlb_load_misses.walk_completed_2m_4m",
  62    },
  63   {
  64    .event_code = {0x08},
  65    .umask = 0x08,
  66    .event_name = "dtlb_load_misses.walk_completed_1g",
  67    },
  68   {
  69    .event_code = {0x08},
  70    .umask = 0x0E,
  71    .event_name = "dtlb_load_misses.walk_completed",
  72    },
  73   {
  74    .event_code = {0x08},
  75    .umask = 0x10,
  76    .event_name = "dtlb_load_misses.walk_pending",
  77    },
  78   {
  79    .event_code = {0x08},
  80    .umask = 0x20,
  81    .event_name = "dtlb_load_misses.stlb_hit",
  82    },
  83   {
  84    .event_code = {0x0D},
  85    .umask = 0x01,
  86    .event_name = "int_misc.recovery_cycles",
  87    },
  88   {
  89    .event_code = {0x0D},
  90    .umask = 0x01,
  91    .anyt = 1,
  92    .event_name = "int_misc.recovery_cycles_any",
  93    },
  94   {
  95    .event_code = {0x0D},
  96    .umask = 0x80,
  97    .event_name = "int_misc.clear_resteer_cycles",
  98    },
  99   {
 100    .event_code = {0x0E},
 101    .umask = 0x01,
 102    .event_name = "uops_issued.any",
 103    },
 104   {
 105    .event_code = {0x0E},
 106    .umask = 0x01,
 107    .cmask = 1,
 108    .inv = 1,
 109    .event_name = "uops_issued.stall_cycles",
 110    },
 111   {
 112    .event_code = {0x0E},
 113    .umask = 0x20,
 114    .event_name = "uops_issued.slow_lea",
 115    },
 116   {
 117    .event_code = {0x14},
 118    .umask = 0x01,
 119    .event_name = "arith.divider_active",
 120    },
 121   {
 122    .event_code = {0x24},
 123    .umask = 0x21,
 124    .event_name = "l2_rqsts.demand_data_rd_miss",
 125    },
 126   {
 127    .event_code = {0x24},
 128    .umask = 0x22,
 129    .event_name = "l2_rqsts.rfo_miss",
 130    },
 131   {
 132    .event_code = {0x24},
 133    .umask = 0x24,
 134    .event_name = "l2_rqsts.code_rd_miss",
 135    },
 136   {
 137    .event_code = {0x24},
 138    .umask = 0x27,
 139    .event_name = "l2_rqsts.all_demand_miss",
 140    },
 141   {
 142    .event_code = {0x24},
 143    .umask = 0x38,
 144    .event_name = "l2_rqsts.pf_miss",
 145    },
 146   {
 147    .event_code = {0x24},
 148    .umask = 0x3F,
 149    .event_name = "l2_rqsts.miss",
 150    },
 151   {
 152    .event_code = {0x24},
 153    .umask = 0xc1,
 154    .event_name = "l2_rqsts.demand_data_rd_hit",
 155    },
 156   {
 157    .event_code = {0x24},
 158    .umask = 0xc2,
 159    .event_name = "l2_rqsts.rfo_hit",
 160    },
 161   {
 162    .event_code = {0x24},
 163    .umask = 0xc4,
 164    .event_name = "l2_rqsts.code_rd_hit",
 165    },
 166   {
 167    .event_code = {0x24},
 168    .umask = 0xd8,
 169    .event_name = "l2_rqsts.pf_hit",
 170    },
 171   {
 172    .event_code = {0x24},
 173    .umask = 0xE1,
 174    .event_name = "l2_rqsts.all_demand_data_rd",
 175    },
 176   {
 177    .event_code = {0x24},
 178    .umask = 0xE2,
 179    .event_name = "l2_rqsts.all_rfo",
 180    },
 181   {
 182    .event_code = {0x24},
 183    .umask = 0xE4,
 184    .event_name = "l2_rqsts.all_code_rd",
 185    },
 186   {
 187    .event_code = {0x24},
 188    .umask = 0xe7,
 189    .event_name = "l2_rqsts.all_demand_references",
 190    },
 191   {
 192    .event_code = {0x24},
 193    .umask = 0xF8,
 194    .event_name = "l2_rqsts.all_pf",
 195    },
 196   {
 197    .event_code = {0x24},
 198    .umask = 0xFF,
 199    .event_name = "l2_rqsts.references",
 200    },
 201   {
 202    .event_code = {0x2E},
 203    .umask = 0x41,
 204    .event_name = "longest_lat_cache.miss",
 205    },
 206   {
 207    .event_code = {0x2E},
 208    .umask = 0x4F,
 209    .event_name = "longest_lat_cache.reference",
 210    },
 211   {
 212    .event_code = {0x32},
 213    .umask = 0x01,
 214    .event_name = "sw_prefetch_access.nta",
 215    },
 216   {
 217    .event_code = {0x32},
 218    .umask = 0x02,
 219    .event_name = "sw_prefetch_access.t0",
 220    },
 221   {
 222    .event_code = {0x32},
 223    .umask = 0x04,
 224    .event_name = "sw_prefetch_access.t1_t2",
 225    },
 226   {
 227    .event_code = {0x32},
 228    .umask = 0x08,
 229    .event_name = "sw_prefetch_access.prefetchw",
 230    },
 231   {
 232    .event_code = {0x3C},
 233    .umask = 0x00,
 234    .event_name = "cpu_clk_unhalted.thread_p",
 235    },
 236   {
 237    .event_code = {0x3C},
 238    .umask = 0x00,
 239    .anyt = 1,
 240    .event_name = "cpu_clk_unhalted.thread_p_any",
 241    },
 242   {
 243    .event_code = {0x3C},
 244    .umask = 0x00,
 245    .event_name = "cpu_clk_unhalted.ring0_trans",
 246    },
 247   {
 248    .event_code = {0x3C},
 249    .umask = 0x01,
 250    .event_name = "cpu_clk_thread_unhalted.ref_xclk",
 251    },
 252   {
 253    .event_code = {0x3C},
 254    .umask = 0x01,
 255    .anyt = 1,
 256    .event_name = "cpu_clk_thread_unhalted.ref_xclk_any",
 257    },
 258   {
 259    .event_code = {0x3C},
 260    .umask = 0x01,
 261    .event_name = "cpu_clk_unhalted.ref_xclk",
 262    },
 263   {
 264    .event_code = {0x3C},
 265    .umask = 0x01,
 266    .event_name = "cpu_clk_unhalted.ref_xclk_any",
 267    },
 268   {
 269    .event_code = {0x3C},
 270    .umask = 0x02,
 271    .event_name = "cpu_clk_thread_unhalted.one_thread_active",
 272    },
 273   {
 274    .event_code = {0x48},
 275    .umask = 0x01,
 276    .cmask = 1,
 277    .event_name = "l1d_pend_miss.pending",
 278    },
 279   {
 280    .event_code = {0x48},
 281    .umask = 0x01,
 282    .event_name = "l1d_pend_miss.pending_cycles",
 283    },
 284   {
 285    .event_code = {0x48},
 286    .umask = 0x02,
 287    .event_name = "l1d_pend_miss.fb_full",
 288    },
 289   {
 290    .event_code = {0x49},
 291    .umask = 0x01,
 292    .event_name = "dtlb_store_misses.miss_causes_a_walk",
 293    },
 294   {
 295    .event_code = {0x49},
 296    .umask = 0x02,
 297    .event_name = "dtlb_store_misses.walk_completed_4k",
 298    },
 299   {
 300    .event_code = {0x49},
 301    .umask = 0x04,
 302    .event_name = "dtlb_store_misses.walk_completed_2m_4m",
 303    },
 304   {
 305    .event_code = {0x49},
 306    .umask = 0x08,
 307    .event_name = "dtlb_store_misses.walk_completed_1g",
 308    },
 309   {
 310    .event_code = {0x49},
 311    .umask = 0x0E,
 312    .event_name = "dtlb_store_misses.walk_completed",
 313    },
 314   {
 315    .event_code = {0x49},
 316    .umask = 0x10,
 317    .cmask = 1,
 318    .event_name = "dtlb_store_misses.walk_active",
 319    },
 320   {
 321    .event_code = {0x49},
 322    .umask = 0x10,
 323    .event_name = "dtlb_store_misses.walk_pending",
 324    },
 325   {
 326    .event_code = {0x49},
 327    .umask = 0x20,
 328    .event_name = "dtlb_store_misses.stlb_hit",
 329    },
 330   {
 331    .event_code = {0x4C},
 332    .umask = 0x01,
 333    .event_name = "load_hit_pre.sw_pf",
 334    },
 335   {
 336    .event_code = {0x4F},
 337    .umask = 0x10,
 338    .event_name = "ept.walk_pending",
 339    },
 340   {
 341    .event_code = {0x51},
 342    .umask = 0x01,
 343    .event_name = "l1d.replacement",
 344    },
 345   {
 346    .event_code = {0x54},
 347    .umask = 0x01,
 348    .event_name = "tx_mem.abort_conflict",
 349    },
 350   {
 351    .event_code = {0x54},
 352    .umask = 0x02,
 353    .event_name = "tx_mem.abort_capacity",
 354    },
 355   {
 356    .event_code = {0x54},
 357    .umask = 0x04,
 358    .event_name = "tx_mem.abort_hle_store_to_elided_lock",
 359    },
 360   {
 361    .event_code = {0x54},
 362    .umask = 0x08,
 363    .event_name = "tx_mem.abort_hle_elision_buffer_not_empty",
 364    },
 365   {
 366    .event_code = {0x54},
 367    .umask = 0x10,
 368    .event_name = "tx_mem.abort_hle_elision_buffer_mismatch",
 369    },
 370   {
 371    .event_code = {0x54},
 372    .umask = 0x20,
 373    .event_name = "tx_mem.abort_hle_elision_buffer_unsupported_alignment",
 374    },
 375   {
 376    .event_code = {0x54},
 377    .umask = 0x40,
 378    .event_name = "tx_mem.hle_elision_buffer_full",
 379    },
 380   {
 381    .event_code = {0x59},
 382    .umask = 0x01,
 383    .event_name = "partial_rat_stalls.scoreboard",
 384    },
 385   {
 386    .event_code = {0x5d},
 387    .umask = 0x01,
 388    .event_name = "tx_exec.misc1",
 389    },
 390   {
 391    .event_code = {0x5d},
 392    .umask = 0x02,
 393    .event_name = "tx_exec.misc2",
 394    },
 395   {
 396    .event_code = {0x5d},
 397    .umask = 0x04,
 398    .event_name = "tx_exec.misc3",
 399    },
 400   {
 401    .event_code = {0x5d},
 402    .umask = 0x08,
 403    .event_name = "tx_exec.misc4",
 404    },
 405   {
 406    .event_code = {0x5d},
 407    .umask = 0x10,
 408    .event_name = "tx_exec.misc5",
 409    },
 410   {
 411    .event_code = {0x5E},
 412    .umask = 0x01,
 413    .event_name = "rs_events.empty_cycles",
 414    },
 415   {
 416    .event_code = {0x5E},
 417    .umask = 0x01,
 418    .cmask = 1,
 419    .inv = 1,
 420    .event_name = "rs_events.empty_end",
 421    },
 422   {
 423    .event_code = {0x60},
 424    .umask = 0x01,
 425    .event_name = "offcore_requests_outstanding.demand_data_rd",
 426    },
 427   {
 428    .event_code = {0x60},
 429    .umask = 0x01,
 430    .cmask = 1,
 431    .event_name = "offcore_requests_outstanding.cycles_with_demand_data_rd",
 432    },
 433   {
 434    .event_code = {0x60},
 435    .umask = 0x02,
 436    .event_name = "offcore_requests_outstanding.demand_code_rd",
 437    },
 438   {
 439    .event_code = {0x60},
 440    .umask = 0x02,
 441    .cmask = 1,
 442    .event_name = "offcore_requests_outstanding.cycles_with_demand_code_rd",
 443    },
 444   {
 445    .event_code = {0x60},
 446    .umask = 0x04,
 447    .event_name = "offcore_requests_outstanding.demand_rfo",
 448    },
 449   {
 450    .event_code = {0x60},
 451    .umask = 0x04,
 452    .cmask = 1,
 453    .event_name = "offcore_requests_outstanding.cycles_with_demand_rfo",
 454    },
 455   {
 456    .event_code = {0x60},
 457    .umask = 0x08,
 458    .event_name = "offcore_requests_outstanding.all_data_rd",
 459    },
 460   {
 461    .event_code = {0x60},
 462    .umask = 0x08,
 463    .cmask = 1,
 464    .event_name = "offcore_requests_outstanding.cycles_with_data_rd",
 465    },
 466   {
 467    .event_code = {0x60},
 468    .umask = 0x10,
 469    .event_name = "offcore_requests_outstanding.l3_miss_demand_data_rd",
 470    },
 471   {
 472    .event_code = {0x79},
 473    .umask = 0x04,
 474    .event_name = "idq.mite_uops",
 475    },
 476   {
 477    .event_code = {0x79},
 478    .umask = 0x04,
 479    .cmask = 1,
 480    .event_name = "idq.mite_cycles",
 481    },
 482   {
 483    .event_code = {0x79},
 484    .umask = 0x08,
 485    .event_name = "idq.dsb_uops",
 486    },
 487   {
 488    .event_code = {0x79},
 489    .umask = 0x08,
 490    .cmask = 1,
 491    .event_name = "idq.dsb_cycles",
 492    },
 493   {
 494    .event_code = {0x79},
 495    .umask = 0x10,
 496    .event_name = "idq.ms_dsb_cycles",
 497    },
 498   {
 499    .event_code = {0x79},
 500    .umask = 0x18,
 501    .cmask = 4,
 502    .event_name = "idq.all_dsb_cycles_4_uops",
 503    },
 504   {
 505    .event_code = {0x79},
 506    .umask = 0x18,
 507    .cmask = 1,
 508    .event_name = "idq.all_dsb_cycles_any_uops",
 509    },
 510   {
 511    .event_code = {0x79},
 512    .umask = 0x20,
 513    .event_name = "idq.ms_mite_uops",
 514    },
 515   {
 516    .event_code = {0x79},
 517    .umask = 0x24,
 518    .event_name = "idq.all_mite_cycles_4_uops",
 519    },
 520   {
 521    .event_code = {0x79},
 522    .umask = 0x24,
 523    .event_name = "idq.all_mite_cycles_any_uops",
 524    },
 525   {
 526    .event_code = {0x79},
 527    .umask = 0x30,
 528    .cmask = 1,
 529    .event_name = "idq.ms_cycles",
 530    },
 531   {
 532    .event_code = {0x79},
 533    .umask = 0x30,
 534    .edge = 1,
 535    .event_name = "idq.ms_switches",
 536    },
 537   {
 538    .event_code = {0x79},
 539    .umask = 0x30,
 540    .event_name = "idq.ms_uops",
 541    },
 542   {
 543    .event_code = {0x80},
 544    .umask = 0x04,
 545    .event_name = "icache_16b.ifdata_stall",
 546    },
 547   {
 548    .event_code = {0x83},
 549    .umask = 0x01,
 550    .event_name = "icache_64b.iftag_hit",
 551    },
 552   {
 553    .event_code = {0x83},
 554    .umask = 0x02,
 555    .event_name = "icache_64b.iftag_miss",
 556    },
 557   {
 558    .event_code = {0x83},
 559    .umask = 0x04,
 560    .event_name = "icache_64b.iftag_stall",
 561    },
 562   {
 563    .event_code = {0x85},
 564    .umask = 0x01,
 565    .event_name = "itlb_misses.miss_causes_a_walk",
 566    },
 567   {
 568    .event_code = {0x85},
 569    .umask = 0x02,
 570    .event_name = "itlb_misses.walk_completed_4k",
 571    },
 572   {
 573    .event_code = {0x85},
 574    .umask = 0x04,
 575    .event_name = "itlb_misses.walk_completed_2m_4m",
 576    },
 577   {
 578    .event_code = {0x85},
 579    .umask = 0x08,
 580    .event_name = "itlb_misses.walk_completed_1g",
 581    },
 582   {
 583    .event_code = {0x85},
 584    .umask = 0x0E,
 585    .event_name = "itlb_misses.walk_completed",
 586    },
 587   {
 588    .event_code = {0x85},
 589    .umask = 0x10,
 590    .event_name = "itlb_misses.walk_pending",
 591    },
 592   {
 593    .event_code = {0x85},
 594    .umask = 0x10,
 595    .event_name = "itlb_misses.walk_active",
 596    },
 597   {
 598    .event_code = {0x85},
 599    .umask = 0x20,
 600    .event_name = "itlb_misses.stlb_hit",
 601    },
 602   {
 603    .event_code = {0x87},
 604    .umask = 0x01,
 605    .event_name = "ild_stall.lcp",
 606    },
 607   {
 608    .event_code = {0x9C},
 609    .umask = 0x01,
 610    .event_name = "idq_uops_not_delivered.core",
 611    },
 612   {
 613    .event_code = {0x9C},
 614    .umask = 0x01,
 615    .cmask = 4,
 616    .event_name = "idq_uops_not_delivered.cycles_0_uops_deliv.core",
 617    },
 618   {
 619    .event_code = {0x9C},
 620    .umask = 0x01,
 621    .cmask = 3,
 622    .event_name = "idq_uops_not_delivered.cycles_le_1_uop_deliv.core",
 623    },
 624   {
 625    .event_code = {0x9C},
 626    .umask = 0x01,
 627    .cmask = 4,
 628    .event_name = "idq_uops_not_delivered.cycles_le_2_uop_deliv.core",
 629    },
 630   {
 631    .event_code = {0x9C},
 632    .umask = 0x01,
 633    .cmask = 1,
 634    .event_name = "idq_uops_not_delivered.cycles_le_3_uop_deliv.core",
 635    },
 636   {
 637    .event_code = {0x9C},
 638    .umask = 0x01,
 639    .cmask = 1,
 640    .inv = 1,
 641    .event_name = "idq_uops_not_delivered.cycles_fe_was_ok",
 642    },
 643   {
 644    .event_code = {0xA1},
 645    .umask = 0x01,
 646    .event_name = "uops_dispatched_port.port_0",
 647    },
 648   {
 649    .event_code = {0xA1},
 650    .umask = 0x02,
 651    .event_name = "uops_dispatched_port.port_1",
 652    },
 653   {
 654    .event_code = {0xA1},
 655    .umask = 0x04,
 656    .event_name = "uops_dispatched_port.port_2",
 657    },
 658   {
 659    .event_code = {0xA1},
 660    .umask = 0x08,
 661    .event_name = "uops_dispatched_port.port_3",
 662    },
 663   {
 664    .event_code = {0xA1},
 665    .umask = 0x10,
 666    .event_name = "uops_dispatched_port.port_4",
 667    },
 668   {
 669    .event_code = {0xA1},
 670    .umask = 0x20,
 671    .event_name = "uops_dispatched_port.port_5",
 672    },
 673   {
 674    .event_code = {0xA1},
 675    .umask = 0x40,
 676    .event_name = "uops_dispatched_port.port_6",
 677    },
 678   {
 679    .event_code = {0xA1},
 680    .umask = 0x80,
 681    .event_name = "uops_dispatched_port.port_7",
 682    },
 683   {
 684    .event_code = {0xa2},
 685    .umask = 0x01,
 686    .event_name = "resource_stalls.any",
 687    },
 688   {
 689    .event_code = {0xA2},
 690    .umask = 0x08,
 691    .event_name = "resource_stalls.sb",
 692    },
 693   {
 694    .event_code = {0xA3},
 695    .umask = 0x01,
 696    .cmask = 1,
 697    .event_name = "cycle_activity.cycles_l2_miss",
 698    },
 699   {
 700    .event_code = {0xA3},
 701    .umask = 0x04,
 702    .cmask = 4,
 703    .event_name = "cycle_activity.stalls_total",
 704    },
 705   {
 706    .event_code = {0xA3},
 707    .umask = 0x05,
 708    .cmask = 5,
 709    .event_name = "cycle_activity.stalls_l2_miss",
 710    },
 711   {
 712    .event_code = {0xA3},
 713    .umask = 0x08,
 714    .cmask = 8,
 715    .event_name = "cycle_activity.cycles_l1d_miss",
 716    },
 717   {
 718    .event_code = {0xA3},
 719    .umask = 0x0C,
 720    .cmask = 12,
 721    .event_name = "cycle_activity.stalls_l1d_miss",
 722    },
 723   {
 724    .event_code = {0xA3},
 725    .umask = 0x10,
 726    .cmask = 16,
 727    .event_name = "cycle_activity.cycles_mem_any",
 728    },
 729   {
 730    .event_code = {0xA3},
 731    .umask = 0x14,
 732    .cmask = 20,
 733    .event_name = "cycle_activity.stalls_mem_any",
 734    },
 735   {
 736    .event_code = {0xA6},
 737    .umask = 0x01,
 738    .event_name = "exe_activity.exe_bound_0_ports",
 739    },
 740   {
 741    .event_code = {0xA6},
 742    .umask = 0x02,
 743    .event_name = "exe_activity.1_ports_util",
 744    },
 745   {
 746    .event_code = {0xA6},
 747    .umask = 0x04,
 748    .event_name = "exe_activity.2_ports_util",
 749    },
 750   {
 751    .event_code = {0xA6},
 752    .umask = 0x08,
 753    .event_name = "exe_activity.3_ports_util",
 754    },
 755   {
 756    .event_code = {0xA6},
 757    .umask = 0x10,
 758    .event_name = "exe_activity.4_ports_util",
 759    },
 760   {
 761    .event_code = {0xA6},
 762    .umask = 0x40,
 763    .event_name = "exe_activity.bound_on_stores",
 764    },
 765   {
 766    .event_code = {0xA8},
 767    .umask = 0x01,
 768    .event_name = "lsd.uops",
 769    },
 770   {
 771    .event_code = {0xA8},
 772    .umask = 0x01,
 773    .cmask = 1,
 774    .event_name = "lsd.cycles_active",
 775    },
 776   {
 777    .event_code = {0xA8},
 778    .umask = 0x01,
 779    .cmask = 4,
 780    .event_name = "lsd.cycles_4_uops",
 781    },
 782   {
 783    .event_code = {0xAB},
 784    .umask = 0x02,
 785    .event_name = "dsb2mite_switches.penalty_cycles",
 786    },
 787   {
 788    .event_code = {0xAE},
 789    .umask = 0x01,
 790    .event_name = "itlb.itlb_flush",
 791    },
 792   {
 793    .event_code = {0xB0},
 794    .umask = 0x01,
 795    .event_name = "offcore_requests.demand_data_rd",
 796    },
 797   {
 798    .event_code = {0xB0},
 799    .umask = 0x02,
 800    .event_name = "offcore_requests.demand_code_rd",
 801    },
 802   {
 803    .event_code = {0xB0},
 804    .umask = 0x04,
 805    .event_name = "offcore_requests.demand_rfo",
 806    },
 807   {
 808    .event_code = {0xB0},
 809    .umask = 0x08,
 810    .event_name = "offcore_requests.all_data_rd",
 811    },
 812   {
 813    .event_code = {0xB0},
 814    .umask = 0x10,
 815    .event_name = "offcore_requests.l3_miss_demand_data_rd",
 816    },
 817   {
 818    .event_code = {0xB0},
 819    .umask = 0x80,
 820    .event_name = "offcore_requests.all_requests",
 821    },
 822   {
 823    .event_code = {0xB1},
 824    .umask = 0x01,
 825    .event_name = "uops_executed.thread",
 826    },
 827   {
 828    .event_code = {0xB1},
 829    .umask = 0x01,
 830    .cmask = 1,
 831    .inv = 1,
 832    .event_name = "uops_executed.stall_cycles",
 833    },
 834   {
 835    .event_code = {0xB1},
 836    .umask = 0x01,
 837    .cmask = 1,
 838    .event_name = "uops_executed.cycles_ge_1_uop_exec",
 839    },
 840   {
 841    .event_code = {0xB1},
 842    .umask = 0x01,
 843    .cmask = 2,
 844    .event_name = "uops_executed.cycles_ge_2_uops_exec",
 845    },
 846   {
 847    .event_code = {0xB1},
 848    .umask = 0x01,
 849    .cmask = 3,
 850    .event_name = "uops_executed.cycles_ge_3_uops_exec",
 851    },
 852   {
 853    .event_code = {0xB1},
 854    .umask = 0x01,
 855    .cmask = 4,
 856    .event_name = "uops_executed.cycles_ge_4_uops_exec",
 857    },
 858   {
 859    .event_code = {0xB1},
 860    .umask = 0x02,
 861    .event_name = "uops_executed.core",
 862    },
 863   {
 864    .event_code = {0xB1},
 865    .umask = 0x02,
 866    .cmask = 1,
 867    .event_name = "uops_executed.core_cycles_ge_1",
 868    },
 869   {
 870    .event_code = {0xB1},
 871    .umask = 0x02,
 872    .cmask = 2,
 873    .event_name = "uops_executed.core_cycles_ge_2",
 874    },
 875   {
 876    .event_code = {0xB1},
 877    .umask = 0x02,
 878    .cmask = 3,
 879    .event_name = "uops_executed.core_cycles_ge_3",
 880    },
 881   {
 882    .event_code = {0xB1},
 883    .umask = 0x02,
 884    .cmask = 4,
 885    .event_name = "uops_executed.core_cycles_ge_4",
 886    },
 887   {
 888    .event_code = {0xB1},
 889    .umask = 0x02,
 890    .cmask = 1,
 891    .inv = 1,
 892    .event_name = "uops_executed.core_cycles_none",
 893    },
 894   {
 895    .event_code = {0xB1},
 896    .umask = 0x10,
 897    .event_name = "uops_executed.x87",
 898    },
 899   {
 900    .event_code = {0xB2},
 901    .umask = 0x01,
 902    .event_name = "offcore_requests_buffer.sq_full",
 903    },
 904   {
 905    .event_code = {0xBD},
 906    .umask = 0x01,
 907    .event_name = "tlb_flush.dtlb_thread",
 908    },
 909   {
 910    .event_code = {0xBD},
 911    .umask = 0x20,
 912    .event_name = "tlb_flush.stlb_any",
 913    },
 914   {
 915    .event_code = {0xC0},
 916    .umask = 0x00,
 917    .event_name = "inst_retired.any_p",
 918    },
 919   {
 920    .event_code = {0xC0},
 921    .umask = 0x01,
 922    .event_name = "inst_retired.prec_dist",
 923    },
 924   {
 925    .event_code = {0xC0},
 926    .umask = 0x01,
 927    .cmask = 10,
 928    .event_name = "inst_retired.total_cycles_ps",
 929    },
 930   {
 931    .event_code = {0xC2},
 932    .umask = 0x02,
 933    .event_name = "uops_retired.retire_slots",
 934    },
 935   {
 936    .event_code = {0xC2},
 937    .umask = 0x02,
 938    .cmask = 1,
 939    .inv = 1,
 940    .event_name = "uops_retired.stall_cycles",
 941    },
 942   {
 943    .event_code = {0xC2},
 944    .umask = 0x02,
 945    .cmask = 10,
 946    .inv = 1,
 947    .event_name = "uops_retired.total_cycles",
 948    },
 949   {
 950    .event_code = {0xC3},
 951    .umask = 0x01,
 952    .cmask = 1,
 953    .edge = 1,
 954    .event_name = "machine_clears.count",
 955    },
 956   {
 957    .event_code = {0xC3},
 958    .umask = 0x02,
 959    .event_name = "machine_clears.memory_ordering",
 960    },
 961   {
 962    .event_code = {0xC3},
 963    .umask = 0x04,
 964    .event_name = "machine_clears.smc",
 965    },
 966   {
 967    .event_code = {0xC4},
 968    .umask = 0x00,
 969    .event_name = "br_inst_retired.all_branches",
 970    },
 971   {
 972    .event_code = {0xC4},
 973    .umask = 0x01,
 974    .event_name = "br_inst_retired.conditional",
 975    },
 976   {
 977    .event_code = {0xC4},
 978    .umask = 0x02,
 979    .event_name = "br_inst_retired.near_call",
 980    },
 981   {
 982    .event_code = {0xC4},
 983    .umask = 0x04,
 984    .event_name = "br_inst_retired.all_branches_pebs",
 985    },
 986   {
 987    .event_code = {0xC4},
 988    .umask = 0x08,
 989    .event_name = "br_inst_retired.near_return",
 990    },
 991   {
 992    .event_code = {0xC4},
 993    .umask = 0x10,
 994    .event_name = "br_inst_retired.not_taken",
 995    },
 996   {
 997    .event_code = {0xC4},
 998    .umask = 0x20,
 999    .event_name = "br_inst_retired.near_taken",
1000    },
1001   {
1002    .event_code = {0xC4},
1003    .umask = 0x40,
1004    .event_name = "br_inst_retired.far_branch",
1005    },
1006   {
1007    .event_code = {0xC5},
1008    .umask = 0x00,
1009    .event_name = "br_misp_retired.all_branches",
1010    },
1011   {
1012    .event_code = {0xC5},
1013    .umask = 0x01,
1014    .event_name = "br_misp_retired.conditional",
1015    },
1016   {
1017    .event_code = {0xC5},
1018    .umask = 0x02,
1019    .event_name = "br_misp_retired.near_call",
1020    },
1021   {
1022    .event_code = {0xC5},
1023    .umask = 0x04,
1024    .event_name = "br_misp_retired.all_branches_pebs",
1025    },
1026   {
1027    .event_code = {0xC5},
1028    .umask = 0x20,
1029    .event_name = "br_misp_retired.near_taken",
1030    },
1031   {
1032    .event_code = {0xC7},
1033    .umask = 0x01,
1034    .event_name = "fp_arith_inst_retired.scalar_double",
1035    },
1036   {
1037    .event_code = {0xC7},
1038    .umask = 0x02,
1039    .event_name = "fp_arith_inst_retired.scalar_single",
1040    },
1041   {
1042    .event_code = {0xC7},
1043    .umask = 0x04,
1044    .event_name = "fp_arith_inst_retired.128b_packed_double",
1045    },
1046   {
1047    .event_code = {0xC7},
1048    .umask = 0x08,
1049    .event_name = "fp_arith_inst_retired.128b_packed_single",
1050    },
1051   {
1052    .event_code = {0xC7},
1053    .umask = 0x10,
1054    .event_name = "fp_arith_inst_retired.256b_packed_double",
1055    },
1056   {
1057    .event_code = {0xC7},
1058    .umask = 0x20,
1059    .event_name = "fp_arith_inst_retired.256b_packed_single",
1060    },
1061   {
1062    .event_code = {0xC8},
1063    .umask = 0x01,
1064    .event_name = "hle_retired.start",
1065    },
1066   {
1067    .event_code = {0xC8},
1068    .umask = 0x02,
1069    .event_name = "hle_retired.commit",
1070    },
1071   {
1072    .event_code = {0xC8},
1073    .umask = 0x04,
1074    .event_name = "hle_retired.aborted",
1075    },
1076   {
1077    .event_code = {0xC8},
1078    .umask = 0x08,
1079    .event_name = "hle_retired.aborted_mem",
1080    },
1081   {
1082    .event_code = {0xC8},
1083    .umask = 0x10,
1084    .event_name = "hle_retired.aborted_timer",
1085    },
1086   {
1087    .event_code = {0xC8},
1088    .umask = 0x20,
1089    .event_name = "hle_retired.aborted_unfriendly",
1090    },
1091   {
1092    .event_code = {0xC8},
1093    .umask = 0x40,
1094    .event_name = "hle_retired.aborted_memtype",
1095    },
1096   {
1097    .event_code = {0xC8},
1098    .umask = 0x80,
1099    .event_name = "hle_retired.aborted_events",
1100    },
1101   {
1102    .event_code = {0xC9},
1103    .umask = 0x01,
1104    .event_name = "rtm_retired.start",
1105    },
1106   {
1107    .event_code = {0xC9},
1108    .umask = 0x02,
1109    .event_name = "rtm_retired.commit",
1110    },
1111   {
1112    .event_code = {0xC9},
1113    .umask = 0x04,
1114    .event_name = "rtm_retired.aborted",
1115    },
1116   {
1117    .event_code = {0xC9},
1118    .umask = 0x08,
1119    .event_name = "rtm_retired.aborted_mem",
1120    },
1121   {
1122    .event_code = {0xC9},
1123    .umask = 0x10,
1124    .event_name = "rtm_retired.aborted_timer",
1125    },
1126   {
1127    .event_code = {0xC9},
1128    .umask = 0x20,
1129    .event_name = "rtm_retired.aborted_unfriendly",
1130    },
1131   {
1132    .event_code = {0xC9},
1133    .umask = 0x40,
1134    .event_name = "rtm_retired.aborted_memtype",
1135    },
1136   {
1137    .event_code = {0xC9},
1138    .umask = 0x80,
1139    .event_name = "rtm_retired.aborted_events",
1140    },
1141   {
1142    .event_code = {0xCA},
1143    .umask = 0x1E,
1144    .cmask = 1,
1145    .event_name = "fp_assist.any",
1146    },
1147   {
1148    .event_code = {0xCB},
1149    .umask = 0x01,
1150    .event_name = "hw_interrupts.received",
1151    },
1152   {
1153    .event_code = {0xCC},
1154    .umask = 0x20,
1155    .event_name = "rob_misc_events.lbr_inserts",
1156    },
1157   {
1158    .event_code = {0xCC},
1159    .umask = 0x40,
1160    .event_name = "rob_misc_events.pause_inst",
1161    },
1162   {
1163    .event_code = {0xD0},
1164    .umask = 0x11,
1165    .event_name = "mem_inst_retired.stlb_miss_loads",
1166    },
1167   {
1168    .event_code = {0xD0},
1169    .umask = 0x12,
1170    .event_name = "mem_inst_retired.stlb_miss_stores",
1171    },
1172   {
1173    .event_code = {0xD0},
1174    .umask = 0x21,
1175    .event_name = "mem_inst_retired.lock_loads",
1176    },
1177   {
1178    .event_code = {0xD0},
1179    .umask = 0x41,
1180    .event_name = "mem_inst_retired.split_loads",
1181    },
1182   {
1183    .event_code = {0xD0},
1184    .umask = 0x42,
1185    .event_name = "mem_inst_retired.split_stores",
1186    },
1187   {
1188    .event_code = {0xD0},
1189    .umask = 0x81,
1190    .event_name = "mem_inst_retired.all_loads",
1191    },
1192   {
1193    .event_code = {0xD0},
1194    .umask = 0x82,
1195    .event_name = "mem_inst_retired.all_stores",
1196    },
1197   {
1198    .event_code = {0xD1},
1199    .umask = 0x01,
1200    .event_name = "mem_load_retired.l1_hit",
1201    },
1202   {
1203    .event_code = {0xD1},
1204    .umask = 0x02,
1205    .event_name = "mem_load_retired.l2_hit",
1206    },
1207   {
1208    .event_code = {0xD1},
1209    .umask = 0x04,
1210    .event_name = "mem_load_retired.l3_hit",
1211    },
1212   {
1213    .event_code = {0xD1},
1214    .umask = 0x08,
1215    .event_name = "mem_load_retired.l1_miss",
1216    },
1217   {
1218    .event_code = {0xD1},
1219    .umask = 0x10,
1220    .event_name = "mem_load_retired.l2_miss",
1221    },
1222   {
1223    .event_code = {0xD1},
1224    .umask = 0x20,
1225    .event_name = "mem_load_retired.l3_miss",
1226    },
1227   {
1228    .event_code = {0xD1},
1229    .umask = 0x40,
1230    .event_name = "mem_load_retired.fb_hit",
1231    },
1232   {
1233    .event_code = {0xD2},
1234    .umask = 0x01,
1235    .event_name = "mem_load_l3_hit_retired.xsnp_miss",
1236    },
1237   {
1238    .event_code = {0xD2},
1239    .umask = 0x02,
1240    .event_name = "mem_load_l3_hit_retired.xsnp_hit",
1241    },
1242   {
1243    .event_code = {0xD2},
1244    .umask = 0x04,
1245    .event_name = "mem_load_l3_hit_retired.xsnp_hitm",
1246    },
1247   {
1248    .event_code = {0xD2},
1249    .umask = 0x08,
1250    .event_name = "mem_load_l3_hit_retired.xsnp_none",
1251    },
1252   {
1253    .event_code = {0xD4},
1254    .umask = 0x04,
1255    .event_name = "mem_load_misc_retired.uc",
1256    },
1257   {
1258    .event_code = {0xE6},
1259    .umask = 0x01,
1260    .event_name = "baclears.any",
1261    },
1262   {
1263    .event_code = {0xF0},
1264    .umask = 0x40,
1265    .event_name = "l2_trans.l2_wb",
1266    },
1267   {
1268    .event_code = {0xF1},
1269    .umask = 0x1F,
1270    .event_name = "l2_lines_in.all",
1271    },
1272   {
1273    .event_code = {0xF2},
1274    .umask = 0x01,
1275    .event_name = "l2_lines_out.silent",
1276    },
1277   {
1278    .event_code = {0xF2},
1279    .umask = 0x02,
1280    .event_name = "l2_lines_out.non_silent",
1281    },
1282   {
1283    .event_code = {0xF2},
1284    .umask = 0x04,
1285    .event_name = "l2_lines_out.useless_pref",
1286    },
1287   {
1288    .event_code = {0xF2},
1289    .umask = 0x04,
1290    .event_name = "l2_lines_out.useless_hwpf",
1291    },
1292   {
1293    .event_code = {0xF4},
1294    .umask = 0x10,
1295    .event_name = "sq_misc.split_lock",
1296    },
1297   {
1298    .event_name = 0,
1299    },
1300 };
1301
1302 PERFMON_REGISTER_INTEL_PMC (cpu_model_table, event_table);
1303