1 /* SPDX-License-Identifier: Apache-2.0
2 * Copyright (c) 2023 Cisco Systems, Inc.
6 #include <vnet/dev/dev.h>
7 #include <vnet/dev/pci.h>
8 #include <vnet/dev/counters.h>
9 #include <dev_iavf/iavf.h>
10 #include <dev_iavf/iavf_regs.h>
11 #include <dev_iavf/virtchnl.h>
12 #include <dev_iavf/virtchnl_funcs.h>
13 #include <vnet/ethernet/ethernet.h>
15 VLIB_REGISTER_LOG_CLASS (iavf_log, static) = {
17 .subclass_name = "port",
20 static const u8 default_rss_key[] = {
21 0x44, 0x39, 0x79, 0x6b, 0xb5, 0x4c, 0x50, 0x23, 0xb6, 0x75, 0xea, 0x5b, 0x12,
22 0x4f, 0x9f, 0x30, 0xb8, 0xa2, 0xc0, 0x3d, 0xdf, 0xdc, 0x4d, 0x02, 0xa0, 0x8c,
23 0x9b, 0x33, 0x4a, 0xf6, 0x4a, 0x4c, 0x05, 0xc6, 0xfa, 0x34, 0x39, 0x58, 0xd8,
24 0x55, 0x7d, 0x99, 0x58, 0x3a, 0xe1, 0x38, 0xc9, 0x2e, 0x81, 0x15, 0x03, 0x66,
27 const static iavf_dyn_ctl dyn_ctln_disabled = {};
28 const static iavf_dyn_ctl dyn_ctln_enabled = {
31 .interval = IAVF_ITR_INT / 2,
33 const static iavf_dyn_ctl dyn_ctln_wb_on_itr = {
40 iavf_port_vlan_strip_disable (vlib_main_t *vm, vnet_dev_port_t *port)
42 vnet_dev_t *dev = port->dev;
43 iavf_port_t *ap = vnet_dev_get_port_data (port);
44 virtchnl_vlan_caps_t vc;
47 const u32 mask = VIRTCHNL_VLAN_ETHERTYPE_8100;
49 if ((ap->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN_V2) == 0)
50 return iavf_vc_op_disable_vlan_stripping (vm, dev);
52 if ((rv = iavf_vc_op_get_offload_vlan_v2_caps (vm, dev, &vc)))
55 outer = vc.offloads.stripping_support.outer;
56 inner = vc.offloads.stripping_support.inner;
58 outer = outer & VIRTCHNL_VLAN_TOGGLE ? outer & mask : 0;
59 inner = inner & VIRTCHNL_VLAN_TOGGLE ? inner & mask : 0;
61 virtchnl_vlan_setting_t vs = {
62 .vport_id = ap->vsi_id,
63 .outer_ethertype_setting = outer,
64 .inner_ethertype_setting = inner,
67 return iavf_vc_op_disable_vlan_stripping_v2 (vm, dev, &vs);
71 iavf_port_init_rss (vlib_main_t *vm, vnet_dev_port_t *port)
73 vnet_dev_t *dev = port->dev;
74 iavf_port_t *ap = vnet_dev_get_port_data (port);
75 u16 keylen = clib_min (sizeof (default_rss_key), ap->rss_key_size);
76 u8 buffer[VIRTCHNL_MSG_SZ (virtchnl_rss_key_t, key, keylen)];
77 virtchnl_rss_key_t *key = (virtchnl_rss_key_t *) buffer;
79 if (!port->attr.caps.rss)
83 *key = (virtchnl_rss_key_t){
88 clib_memcpy (key->key, default_rss_key, sizeof (default_rss_key));
90 return iavf_vc_op_config_rss_key (vm, dev, key);
94 iavf_port_update_rss_lut (vlib_main_t *vm, vnet_dev_port_t *port)
96 vnet_dev_t *dev = port->dev;
97 iavf_port_t *ap = vnet_dev_get_port_data (port);
98 u16 lut_size = clib_min (IAVF_MAX_RSS_LUT_SIZE, ap->rss_lut_size);
99 u8 buffer[VIRTCHNL_MSG_SZ (virtchnl_rss_lut_t, lut, lut_size)];
100 virtchnl_rss_lut_t *lut = (virtchnl_rss_lut_t *) buffer;
101 u32 enabled_rxq_bmp = 0;
103 if (!port->attr.caps.rss)
106 *lut = (virtchnl_rss_lut_t){
107 .vsi_id = ap->vsi_id,
108 .lut_entries = lut_size,
111 foreach_vnet_dev_port_rx_queue (q, port)
113 enabled_rxq_bmp |= 1ULL << q->queue_id;
116 for (u32 i = 0, j; i < lut->lut_entries;)
117 foreach_set_bit_index (j, enabled_rxq_bmp)
120 if (i >= lut->lut_entries)
124 return iavf_vc_op_config_rss_lut (vm, dev, lut);
128 iavf_port_init_vsi_queues (vlib_main_t *vm, vnet_dev_port_t *port)
130 vnet_dev_t *dev = port->dev;
131 iavf_port_t *ap = vnet_dev_get_port_data (port);
132 virtchnl_queue_pair_info_t *qpi;
133 u16 vsi_id = ap->vsi_id;
134 u16 data_size = vlib_buffer_get_default_data_size (vm);
135 u16 max_frame_size = port->max_rx_frame_size;
136 u8 buffer[VIRTCHNL_MSG_SZ (virtchnl_vsi_queue_config_info_t, qpair,
138 virtchnl_vsi_queue_config_info_t *ci =
139 (virtchnl_vsi_queue_config_info_t *) buffer;
141 *ci = (virtchnl_vsi_queue_config_info_t){
142 .num_queue_pairs = ap->num_qp,
146 for (u16 i = 0; i < ap->num_qp; i++)
147 ci->qpair[i] = (virtchnl_queue_pair_info_t){
148 .rxq = { .vsi_id = vsi_id, .queue_id = i },
149 .txq = { .vsi_id = vsi_id, .queue_id = i },
152 foreach_vnet_dev_port_rx_queue (q, port)
154 iavf_rxq_t *arq = vnet_dev_get_rx_queue_data (q);
155 qpi = ci->qpair + q->queue_id;
156 qpi->rxq.ring_len = q->size;
157 qpi->rxq.databuffer_size = data_size;
158 qpi->rxq.dma_ring_addr = vnet_dev_get_dma_addr (vm, dev, arq->descs);
159 qpi->rxq.max_pkt_size = max_frame_size;
162 foreach_vnet_dev_port_tx_queue (q, port)
164 iavf_txq_t *atq = vnet_dev_get_tx_queue_data (q);
165 qpi = ci->qpair + q->queue_id;
166 qpi->txq.ring_len = q->size;
167 qpi->txq.dma_ring_addr = vnet_dev_get_dma_addr (vm, dev, atq->descs);
170 return iavf_vc_op_config_vsi_queues (vm, dev, ci);
174 iavf_port_rx_irq_config (vlib_main_t *vm, vnet_dev_port_t *port, int enable)
176 vnet_dev_t *dev = port->dev;
177 iavf_device_t *ad = vnet_dev_get_data (dev);
178 iavf_port_t *ap = vnet_dev_get_port_data (port);
179 u16 n_rx_vectors = ap->n_rx_vectors;
180 u8 buffer[VIRTCHNL_MSG_SZ (virtchnl_irq_map_info_t, vecmap, n_rx_vectors)];
181 u8 n_intr_mode_queues_per_vector[n_rx_vectors];
182 u8 n_queues_per_vector[n_rx_vectors];
183 virtchnl_irq_map_info_t *im = (virtchnl_irq_map_info_t *) buffer;
186 log_debug (dev, "intr mode per queue bitmap 0x%x",
187 ap->intr_mode_per_rxq_bitmap);
189 for (u32 i = 0; i < n_rx_vectors; i++)
190 n_intr_mode_queues_per_vector[i] = n_queues_per_vector[i] = 0;
192 *im = (virtchnl_irq_map_info_t){
193 .num_vectors = n_rx_vectors,
196 if (port->attr.caps.interrupt_mode)
198 for (u16 i = 0; i < im->num_vectors; i++)
199 im->vecmap[i] = (virtchnl_vector_map_t){
200 .vsi_id = ap->vsi_id,
204 foreach_vnet_dev_port_rx_queue (rxq, port)
207 u32 i = rxq->rx_thread_index;
208 im->vecmap[i].rxq_map |= 1 << rxq->queue_id;
209 n_queues_per_vector[i]++;
210 n_intr_mode_queues_per_vector[i] +=
211 u64_is_bit_set (ap->intr_mode_per_rxq_bitmap, rxq->queue_id);
216 im->vecmap[0] = (virtchnl_vector_map_t){
217 .vsi_id = ap->vsi_id,
221 foreach_vnet_dev_port_rx_queue (rxq, port)
223 im->vecmap[0].rxq_map |= 1 << rxq->queue_id;
226 if ((rv = iavf_vc_op_config_irq_map (vm, dev, im)))
229 for (int i = 0; i < n_rx_vectors; i++)
233 if (enable == 0 || n_queues_per_vector[i] == 0)
234 val = dyn_ctln_disabled.as_u32;
235 else if (ap->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_WB_ON_ITR &&
236 n_intr_mode_queues_per_vector[i] == 0)
237 val = dyn_ctln_wb_on_itr.as_u32;
239 val = dyn_ctln_enabled.as_u32;
241 iavf_reg_write (ad, IAVF_VFINT_DYN_CTLN (i), val);
242 log_debug (dev, "VFINT_DYN_CTLN(%u) set to 0x%x", i, val);
249 avf_msix_n_handler (vlib_main_t *vm, vnet_dev_t *dev, u16 line)
251 iavf_device_t *ad = vnet_dev_get_data (dev);
252 vnet_dev_port_t *port = vnet_dev_get_port_by_id (dev, 0);
256 iavf_reg_write (ad, IAVF_VFINT_DYN_CTLN (line), dyn_ctln_enabled.as_u32);
257 vlib_node_set_interrupt_pending (vlib_get_main_by_index (line),
258 port->intf.rx_node_index);
262 iavf_port_init (vlib_main_t *vm, vnet_dev_port_t *port)
264 vnet_dev_t *dev = port->dev;
265 iavf_port_t *ap = vnet_dev_get_port_data (port);
268 log_debug (port->dev, "port %u", port->port_id);
270 ap->intr_mode_per_rxq_bitmap = 0;
271 foreach_vnet_dev_port_rx_queue (q, port)
272 if (q->interrupt_mode)
273 u64_bit_set (&ap->intr_mode_per_rxq_bitmap, q->queue_id, 1);
275 if ((rv = iavf_port_vlan_strip_disable (vm, port)))
278 if ((rv = iavf_port_init_rss (vm, port)))
281 vnet_dev_pci_msix_add_handler (vm, dev, &avf_msix_n_handler, 1,
283 vnet_dev_pci_msix_enable (vm, dev, 1, ap->n_rx_vectors);
284 for (u32 i = 1; i < ap->n_rx_vectors; i++)
285 vnet_dev_pci_msix_set_polling_thread (vm, dev, i + 1, i);
287 if (port->dev->poll_stats)
288 iavf_port_add_counters (vm, port);
294 iavf_enable_disable_queues (vlib_main_t *vm, vnet_dev_port_t *port, int enable)
296 iavf_port_t *ap = vnet_dev_get_port_data (port);
298 virtchnl_queue_select_t qs = {
299 .vsi_id = ap->vsi_id,
302 foreach_vnet_dev_port_rx_queue (q, port)
303 if ((enable && q->enabled) || (!enable && q->started))
304 qs.rx_queues |= 1ULL << q->queue_id;
306 foreach_vnet_dev_port_tx_queue (q, port)
307 if ((enable && q->enabled) || (!enable && q->started))
308 qs.tx_queues |= 1ULL << q->queue_id;
310 return enable ? iavf_vc_op_enable_queues (vm, port->dev, &qs) :
311 iavf_vc_op_disable_queues (vm, port->dev, &qs);
315 iavf_port_start (vlib_main_t *vm, vnet_dev_port_t *port)
319 log_debug (port->dev, "port %u", port->port_id);
321 foreach_vnet_dev_port_rx_queue (q, port)
323 if ((rv = iavf_rx_queue_start (vm, q)))
326 foreach_vnet_dev_port_tx_queue (q, port)
327 if ((rv = iavf_tx_queue_start (vm, q)))
330 if ((rv = iavf_port_update_rss_lut (vm, port)))
333 /* configure qpairs */
334 if ((rv = iavf_port_init_vsi_queues (vm, port)))
337 if ((rv = iavf_port_rx_irq_config (vm, port, /* enable */ 1)))
340 if ((rv = iavf_enable_disable_queues (vm, port, 1)))
343 if (port->dev->poll_stats)
344 vnet_dev_poll_port_add (vm, port, 1, iavf_port_poll_stats);
349 foreach_vnet_dev_port_rx_queue (q, port)
350 iavf_rx_queue_stop (vm, q);
351 foreach_vnet_dev_port_tx_queue (q, port)
352 iavf_tx_queue_stop (vm, q);
358 iavf_port_stop (vlib_main_t *vm, vnet_dev_port_t *port)
360 log_debug (port->dev, "port %u", port->port_id);
362 iavf_enable_disable_queues (vm, port, /* enable */ 0);
363 iavf_port_rx_irq_config (vm, port, /* disable */ 0);
365 if (port->dev->poll_stats)
366 vnet_dev_poll_port_remove (vm, port, iavf_port_poll_stats);
368 foreach_vnet_dev_port_rx_queue (rxq, port)
369 iavf_rx_queue_stop (vm, rxq);
371 foreach_vnet_dev_port_tx_queue (txq, port)
372 iavf_tx_queue_stop (vm, txq);
374 vnet_dev_port_state_change (vm, port,
375 (vnet_dev_port_state_changes_t){
376 .change.link_state = 1,
377 .change.link_speed = 1,
384 iavf_port_cfg_change_validate (vlib_main_t *vm, vnet_dev_port_t *port,
385 vnet_dev_port_cfg_change_req_t *req)
387 vnet_dev_rv_t rv = VNET_DEV_OK;
391 case VNET_DEV_PORT_CFG_MAX_RX_FRAME_SIZE:
393 rv = VNET_DEV_ERR_PORT_STARTED;
396 case VNET_DEV_PORT_CFG_PROMISC_MODE:
397 case VNET_DEV_PORT_CFG_CHANGE_PRIMARY_HW_ADDR:
398 case VNET_DEV_PORT_CFG_ADD_SECONDARY_HW_ADDR:
399 case VNET_DEV_PORT_CFG_REMOVE_SECONDARY_HW_ADDR:
403 rv = VNET_DEV_ERR_NOT_SUPPORTED;
410 iavf_port_add_del_eth_addr (vlib_main_t *vm, vnet_dev_port_t *port,
411 vnet_dev_hw_addr_t *addr, int is_add,
414 iavf_port_t *ap = vnet_dev_get_port_data (port);
415 virtchnl_ether_addr_list_t al = {
416 .vsi_id = ap->vsi_id,
418 .list[0].primary = is_primary ? 1 : 0,
419 .list[0].extra = is_primary ? 0 : 1,
422 clib_memcpy (al.list[0].addr, addr, sizeof (al.list[0].addr));
424 return is_add ? iavf_vc_op_add_eth_addr (vm, port->dev, &al) :
425 iavf_vc_op_del_eth_addr (vm, port->dev, &al);
429 iavf_port_cfg_rxq_int_mode_change (vlib_main_t *vm, vnet_dev_port_t *port,
430 u16 qid, u8 state, u8 all)
432 vnet_dev_rv_t rv = VNET_DEV_OK;
433 iavf_port_t *ap = vnet_dev_get_port_data (port);
434 vnet_dev_t *dev = port->dev;
435 char *ed = state ? "ena" : "disa";
440 old = ap->intr_mode_per_rxq_bitmap;
444 snprintf (qstr, sizeof (qstr), "all queues");
446 foreach_vnet_dev_port_rx_queue (q, port)
447 u64_bit_set (&new, q->queue_id, 1);
451 snprintf (qstr, sizeof (qstr), "queue %u", qid);
453 u64_bit_set (&new, qid, state);
458 log_warn (dev, "interrupt mode already %sbled on %s", ed, qstr);
462 ap->intr_mode_per_rxq_bitmap = new;
466 if ((rv = iavf_port_rx_irq_config (vm, port, 1)))
468 ap->intr_mode_per_rxq_bitmap = old;
469 log_err (dev, "failed to %sble interrupt mode on %s", ed, qstr);
474 log_debug (dev, "interrupt mode %sbled on %s, new bitmap is 0x%x", ed, qstr,
480 iavf_port_cfg_change (vlib_main_t *vm, vnet_dev_port_t *port,
481 vnet_dev_port_cfg_change_req_t *req)
483 vnet_dev_t *dev = port->dev;
484 iavf_port_t *ap = vnet_dev_get_port_data (port);
485 vnet_dev_rv_t rv = VNET_DEV_OK;
489 case VNET_DEV_PORT_CFG_PROMISC_MODE:
491 virtchnl_promisc_info_t pi = {
492 .vsi_id = ap->vsi_id,
493 .unicast_promisc = req->promisc,
494 .multicast_promisc = req->promisc,
497 rv = iavf_vc_op_config_promisc_mode (vm, dev, &pi);
501 case VNET_DEV_PORT_CFG_CHANGE_PRIMARY_HW_ADDR:
502 rv = iavf_port_add_del_eth_addr (vm, port, &port->primary_hw_addr,
505 if (rv == VNET_DEV_OK)
506 rv = iavf_port_add_del_eth_addr (vm, port, &req->addr,
511 case VNET_DEV_PORT_CFG_ADD_SECONDARY_HW_ADDR:
512 rv = iavf_port_add_del_eth_addr (vm, port, &req->addr,
517 case VNET_DEV_PORT_CFG_REMOVE_SECONDARY_HW_ADDR:
518 rv = iavf_port_add_del_eth_addr (vm, port, &req->addr,
523 case VNET_DEV_PORT_CFG_MAX_RX_FRAME_SIZE:
526 case VNET_DEV_PORT_CFG_RXQ_INTR_MODE_ENABLE:
527 rv = iavf_port_cfg_rxq_int_mode_change (vm, port, req->queue_id, 1,
531 case VNET_DEV_PORT_CFG_RXQ_INTR_MODE_DISABLE:
532 rv = iavf_port_cfg_rxq_int_mode_change (vm, port, req->queue_id, 0,
537 return VNET_DEV_ERR_NOT_SUPPORTED;