2 * Copyright (c) 2018 Cisco and/or its affiliates.
3 * Licensed under the Apache License, Version 2.0 (the "License");
4 * you may not use this file except in compliance with the License.
5 * You may obtain a copy of the License at:
7 * http://www.apache.org/licenses/LICENSE-2.0
9 * Unless required by applicable law or agreed to in writing, software
10 * distributed under the License is distributed on an "AS IS" BASIS,
11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 * See the License for the specific language governing permissions and
13 * limitations under the License.
16 #ifndef __included_vmnet_vmnet_h__
17 #define __included_vmnet_vmnet_h__
19 #define foreach_vmxnet3_tx_func_error \
20 _(ERROR_PACKETS, "error packets") \
21 _(NO_FREE_SLOTS, "no free tx slots")
25 #define _(f,s) VMXNET3_TX_ERROR_##f,
26 foreach_vmxnet3_tx_func_error
29 } vmxnet3_tx_func_error_t;
31 #define foreach_vmxnet3_rxmode_flags \
32 _(0, UCAST, "unicast") \
33 _(1, MCAST, "multicast") \
34 _(2, BCAST, "broadcast") \
35 _(3, ALL_MULTI, "all multicast") \
36 _(4, PROMISC, "promiscuous")
40 #define _(a, b, c) VMXNET3_RXMODE_##b = (1 << a),
41 foreach_vmxnet3_rxmode_flags
46 #define VMXNET3_REG_IMR 0x0000 /* Interrupt Mask Register */
47 #define VMXNET3_REG_TXPROD 0x0600 /* Tx Producer Index */
48 #define VMXNET3_REG_RXPROD 0x0800 /* Rx Producer Index for ring 1 */
49 #define VMXNET3_REG_RXPROD2 0x0A00 /* Rx Producer Index for ring 2 */
53 #define VMXNET3_REG_VRRS 0x0000 /* VMXNET3 Revision Report Selection */
54 #define VMXNET3_REG_UVRS 0x0008 /* UPT Version Report Selection */
55 #define VMXNET3_REG_DSAL 0x0010 /* Driver Shared Address Low */
56 #define VMXNET3_REG_DSAH 0x0018 /* Driver Shared Address High */
57 #define VMXNET3_REG_CMD 0x0020 /* Command */
58 #define VMXNET3_REG_MACL 0x0028 /* MAC Address Low */
59 #define VMXNET3_REG_MACH 0x0030 /* MAC Address High */
60 #define VMXNET3_REG_ICR 0x0038 /* Interrupt Cause Register */
61 #define VMXNET3_REG_ECR 0x0040 /* Event Cause Register */
63 #define VMXNET3_VLAN_LEN 4
64 #define VMXNET3_FCS_LEN 4
65 #define VMXNET3_MTU (1514 + VMXNET3_VLAN_LEN + VMXNET3_FCS_LEN)
67 #define VMXNET3_RXF_BTYPE (1 << 14) /* rx body buffer type */
68 #define VMXNET3_RXF_GEN (1 << 31) /* rx generation */
69 #define VMXNET3_RXCF_GEN (1 << 31) /* rx completion generation */
70 #define VMXNET3_RXC_INDEX (0xFFF) /* rx completion index mask */
72 #define VMXNET3_TXF_GEN (1 << 14) /* tx generation */
73 #define VMXNET3_TXF_EOP (1 << 12) /* tx end of packet */
74 #define VMXNET3_TXF_CQ (1 << 13) /* tx completion request */
75 #define VMXNET3_TXCF_GEN (1 << 31) /* tx completion generation */
76 #define VMXNET3_TXC_INDEX (0xFFF) /* tx completion index mask */
78 #define VMXNET3_RX_RING_SIZE 2
79 #define VMXNET3_INPUT_REFILL_THRESHOLD 32
80 #define VMXNET3_NUM_TX_DESC 1024
81 #define VMXNET3_NUM_TX_COMP VMXNET3_NUM_TX_DESC
82 #define VMXNET3_NUM_RX_DESC 1024
83 #define VMXNET3_NUM_RX_COMP VMXNET3_NUM_RX_DESC
85 #define VMXNET3_VERSION_MAGIC 0x69505845
86 #define VMXNET3_SHARED_MAGIC 0xbabefee1
87 #define VMXNET3_VERSION_SELECT 1
88 #define VMXNET3_UPT_VERSION_SELECT 1
89 #define VMXNET3_MAX_INTRS 25
90 #define VMXNET3_IC_DISABLE_ALL 0x1
92 #define VMXNET3_GOS_BITS_32 (1 << 0)
93 #define VMXNET3_GOS_BITS_64 (2 << 0)
94 #define VMXNET3_GOS_TYPE_LINUX (1 << 2)
95 #define VMXNET3_RXCL_LEN_MASK (0x3FFF) // 14 bits
96 #define VMXNET3_RXCL_ERROR (1 << 14)
97 #define VMXNET3_RXCI_EOP (1 << 14)
98 #define VMXNET3_RXCI_SOP (1 << 15)
100 #define foreach_vmxnet3_device_flags \
101 _(0, INITIALIZED, "initialized") \
102 _(1, ERROR, "error") \
103 _(2, ADMIN_UP, "admin-up") \
105 _(4, LINK_UP, "link-up") \
106 _(5, SHARED_TXQ_LOCK, "shared-txq-lock") \
111 #define _(a, b, c) VMXNET3_DEVICE_F_##b = (1 << a),
112 foreach_vmxnet3_device_flags
116 #define foreach_vmxnet3_set_cmds \
117 _(0, ACTIVATE_DEV, "activate device") \
118 _(1, QUIESCE_DEV, "quiesce device") \
119 _(2, RESET_DEV, "reset device") \
120 _(3, UPDATE_RX_MODE, "update rx mode") \
121 _(4, UPDATE_MAC_FILTERS, "update mac filters") \
122 _(5, UPDATE_VLAN_FILTERS, "update vlan filters") \
123 _(6, UPDATE_RSSIDT, "update rss idt") \
124 _(7, UPDATE_IML, "update iml") \
125 _(8, UPDATE_PMCFG, "update pm cfg") \
126 _(9, UPDATE_FEATURE, "update feature") \
127 _(10, STOP_EMULATION, "stop emulation") \
128 _(11, LOAD_PLUGIN, "load plugin") \
129 _(12, ACTIVATE_VF, "activate vf") \
130 _(13, RESERVED3, "reserved 3") \
131 _(14, RESERVED4, "reservced 4") \
132 _(15, REGISTER_MEMREGS, "register mem regs")
136 #define _(a, b, c) VMXNET3_CMD_##b = (a + 0xCAFE0000),
137 foreach_vmxnet3_set_cmds
141 #define foreach_vmxnet3_get_cmds \
142 _(0, GET_QUEUE_STATUS, "get queue status") \
143 _(1, GET_STATS, "get stats") \
144 _(2, GET_LINK, "get link") \
145 _(3, GET_PERM_MAC_LO, "get perm mac lo") \
146 _(4, GET_PERM_MAC_HI, "get perm mac hi") \
147 _(5, GET_DID_LO, "get did lo") \
148 _(6, GET_DID_HI, "get did hi") \
149 _(7, GET_DEV_EXTRA_INFO, "get dev extra info") \
150 _(8, GET_CONF_INTR, "get conf intr") \
151 _(9, GET_ADAPTIVE_RING_INFO, "get adaptive ring info") \
152 _(10, GET_TXDATA_DESC_SIZE, "gte txdata desc size") \
153 _(11, RESERVED5, "reserved5")
157 #define _(a, b, c) VMXNET3_CMD_##b = (a + 0xF00D0000),
158 foreach_vmxnet3_get_cmds
162 typedef CLIB_PACKED (struct
164 u32 version; u32 guest_info; u32 version_support;
165 u32 upt_version_support; u64 upt_features;
166 u64 driver_data_address; u64 queue_desc_address;
167 u32 driver_data_len; u32 queue_desc_len;
169 u16 max_num_rx_sg; u8 num_tx_queues; u8 num_rx_queues;
171 }) vmxnet3_misc_config;
173 typedef CLIB_PACKED (struct
178 u8 moderation_level[VMXNET3_MAX_INTRS]; u32 control;
180 }) vmxnet3_interrupt_config;
182 typedef CLIB_PACKED (struct
186 u16 pad; u64 multicast_address; u8 vlan_filter[512];
187 }) vmxnet3_rx_filter_config;
189 typedef CLIB_PACKED (struct
191 u32 version; u32 length;
193 }) vmxnet3_variable_config;
195 typedef CLIB_PACKED (struct
199 vmxnet3_misc_config misc;
200 vmxnet3_interrupt_config interrupt;
201 vmxnet3_rx_filter_config rx_filter;
202 vmxnet3_variable_config rss;
203 vmxnet3_variable_config pattern;
204 vmxnet3_variable_config plugin; u32 ecr;
208 typedef CLIB_PACKED (struct
213 }) vmxnet3_queue_status;
215 typedef CLIB_PACKED (struct
217 u32 num_deferred; u32 threshold;
219 }) vmxnet3_tx_queue_control;
221 typedef CLIB_PACKED (struct
225 u64 comp_address; u64 driver_data_address; u64 pad;
228 u32 num_comp; u32 driver_data_len; u8 intr_index;
230 }) vmxnet3_tx_queue_config;
232 typedef CLIB_PACKED (struct
236 u64 ucast_pkts; u64 ucast_bytes; u64 mcast_pkts;
238 u64 bcast_pkts; u64 bcast_bytes; u64 error_pkts;
242 typedef CLIB_PACKED (struct
244 vmxnet3_tx_queue_control ctrl;
245 vmxnet3_tx_queue_config cfg;
246 vmxnet3_queue_status status; vmxnet3_tx_stats stats;
250 typedef CLIB_PACKED (struct
252 u8 update_prod; u8 pad[7];
254 }) vmxnet3_rx_queue_control;
256 typedef CLIB_PACKED (struct
259 u64 comp_address; u64 driver_data_address; u64 pad;
261 u32 num_comp; u32 driver_data_len; u8 intr_index;
263 }) vmxnet3_rx_queue_config;
265 typedef CLIB_PACKED (struct
269 u64 ucast_pkts; u64 ucast_bytes; u64 mcast_pkts;
271 u64 bcast_pkts; u64 bcast_bytes; u64 nobuf_pkts;
275 typedef CLIB_PACKED (struct
277 vmxnet3_rx_queue_control ctrl;
278 vmxnet3_rx_queue_config cfg;
279 vmxnet3_queue_status status; vmxnet3_rx_stats stats;
283 typedef CLIB_PACKED (struct
285 vmxnet3_tx_queue tx; vmxnet3_rx_queue rx;
290 * buffer length -- bits 0-13
291 * buffer type -- bit 14
292 * descriptor type -- bit 15
293 * reserved -- bits 16-30
294 * generation -- bit 31
296 typedef CLIB_PACKED (struct
305 * RX desc index -- bits 0-11
307 * end of packet -- bit 14
308 * start of packet -- bit 15
309 * ring ID -- bits 16-25
310 * RSS hash type -- bits 26-29
311 * checksum not calculated -- bit 30
314 * rss: RSS hash value
317 * data length -- bits 0-13
319 * tag is stripped -- bit 15
320 * tag stripped -- bits 16-31
323 * checksum -- bits 0 - 15
324 * tcp/udp checksum correct-- bit 16
325 * udp packet -- bit 17
326 * tcp packet -- bit 18
327 * ip checksum correct -- bit 19
330 * ip fragment -- bit 22
331 * frame crc correct -- bit 23
332 * completion type -- bits 24-30
333 * generation -- bit 31
335 typedef CLIB_PACKED (struct
344 * TX desc index -- bits 0-11
348 * reserved -- bits 0-23
349 * completion type -- bits 24-30
350 * generation -- bit 31
352 typedef CLIB_PACKED (struct
361 * length -- bits 0-13
362 * generation -- bit 14
364 * descriptor type -- bit 16
366 * MSS, checksum offset -- bits 18-31
368 * header length -- bits 0-9
369 * offload mode -- bits 10-11
370 * end of packet -- bit 12
371 * completion request -- bit 13
373 * vlan tag insertion -- bit 15
374 * tag to insert -- bits 16-31
376 typedef CLIB_PACKED (struct
384 CLIB_CACHE_LINE_ALIGN_MARK (cacheline0);
395 CLIB_CACHE_LINE_ALIGN_MARK (cacheline0);
398 } vmxnet3_rx_comp_ring;
402 CLIB_CACHE_LINE_ALIGN_MARK (cacheline0);
405 vmxnet3_rx_ring rx_ring[VMXNET3_RX_RING_SIZE];
406 vmxnet3_rx_desc *rx_desc[VMXNET3_RX_RING_SIZE];
407 vmxnet3_rx_comp *rx_comp;
408 vmxnet3_rx_comp_ring rx_comp_ring;
413 CLIB_CACHE_LINE_ALIGN_MARK (cacheline0);
422 CLIB_CACHE_LINE_ALIGN_MARK (cacheline0);
425 } vmxnet3_tx_comp_ring;
429 CLIB_CACHE_LINE_ALIGN_MARK (cacheline0);
431 clib_spinlock_t lock;
433 vmxnet3_tx_desc *tx_desc;
434 vmxnet3_tx_comp *tx_comp;
435 vmxnet3_tx_ring tx_ring;
436 vmxnet3_tx_comp_ring tx_comp_ring;
439 typedef CLIB_PACKED (struct
441 vmxnet3_queues queues; vmxnet3_shared shared;
446 CLIB_CACHE_LINE_ALIGN_MARK (cacheline0);
448 u32 per_interface_next_index;
453 vlib_pci_dev_handle_t pci_dev_handle;
454 vlib_pci_addr_t pci_addr;
477 vmxnet3_device_t *devices;
478 vlib_physmem_region_index_t physmem_region;
479 u32 physmem_region_alloc;
483 extern vmxnet3_main_t vmxnet3_main;
487 vlib_pci_addr_t addr;
495 } vmxnet3_create_if_args_t;
501 vlib_buffer_t buffer;
502 } vmxnet3_input_trace_t;
504 void vmxnet3_create_if (vlib_main_t * vm, vmxnet3_create_if_args_t * args);
505 void vmxnet3_delete_if (vlib_main_t * vm, vmxnet3_device_t * ad);
507 extern clib_error_t *vmxnet3_plugin_api_hookup (vlib_main_t * vm);
508 extern vlib_node_registration_t vmxnet3_input_node;
509 extern vnet_device_class_t vmxnet3_device_class;
512 format_function_t format_vmxnet3_device;
513 format_function_t format_vmxnet3_device_name;
514 format_function_t format_vmxnet3_input_trace;
516 static_always_inline void
517 vmxnet3_reg_write (vmxnet3_device_t * vd, u8 bar, u32 addr, u32 val)
519 *(volatile u32 *) ((u8 *) vd->bar[bar] + addr) = val;
522 static_always_inline u32
523 vmxnet3_reg_read (vmxnet3_device_t * vd, u8 bar, u32 addr)
525 return *(volatile u32 *) (vd->bar[bar] + addr);
528 static_always_inline uword
529 vmxnet3_dma_addr (vlib_main_t * vm, vmxnet3_device_t * vd, void *p)
531 vmxnet3_main_t *vmxm = &vmxnet3_main;
533 return (vd->flags & VMXNET3_DEVICE_F_IOVA) ? pointer_to_uword (p) :
534 vlib_physmem_virtual_to_physical (vm, vmxm->physmem_region, p);
537 static_always_inline void
538 vmxnet3_rx_ring_advance_produce (vmxnet3_rxq_t * rxq, vmxnet3_rx_ring * ring)
541 if (PREDICT_FALSE (ring->produce == rxq->size))
544 ring->gen ^= VMXNET3_RXF_GEN;
548 static_always_inline clib_error_t *
549 vmxnet3_rxq_refill_ring0 (vlib_main_t * vm, vmxnet3_device_t * vd,
552 vmxnet3_rx_desc *rxd;
553 u16 n_refill, n_alloc;
554 vmxnet3_rx_ring *ring;
556 ring = &rxq->rx_ring[0];
557 n_refill = rxq->size - ring->fill;
559 if (PREDICT_TRUE (n_refill <= VMXNET3_INPUT_REFILL_THRESHOLD))
563 vlib_buffer_alloc_to_ring (vm, ring->bufs, ring->produce, rxq->size,
565 if (PREDICT_FALSE (n_alloc != n_refill))
568 vlib_buffer_free_from_ring (vm, ring->bufs, ring->produce, rxq->size,
570 return clib_error_return (0, "buffer alloc failed");
575 rxd = &rxq->rx_desc[0][ring->produce];
577 vlib_get_buffer_data_physical_address (vm, ring->bufs[ring->produce]);
578 rxd->flags = ring->gen | VLIB_BUFFER_DATA_SIZE;
580 vmxnet3_rx_ring_advance_produce (rxq, ring);
585 vmxnet3_reg_write (vd, 0, VMXNET3_REG_RXPROD, ring->produce);
590 static_always_inline clib_error_t *
591 vmxnet3_rxq_refill_ring1 (vlib_main_t * vm, vmxnet3_device_t * vd,
594 vmxnet3_rx_desc *rxd;
595 u16 n_refill, n_alloc;
596 vmxnet3_rx_ring *ring;
598 ring = &rxq->rx_ring[1];
599 n_refill = rxq->size - ring->fill;
601 if (PREDICT_TRUE (n_refill <= VMXNET3_INPUT_REFILL_THRESHOLD))
605 vlib_buffer_alloc_to_ring (vm, ring->bufs, ring->produce, rxq->size,
607 if (PREDICT_FALSE (n_alloc != n_refill))
610 vlib_buffer_free_from_ring (vm, ring->bufs, ring->produce, rxq->size,
612 return clib_error_return (0, "buffer alloc failed");
617 rxd = &rxq->rx_desc[1][ring->produce];
619 vlib_get_buffer_data_physical_address (vm, ring->bufs[ring->produce]);
620 rxd->flags = ring->gen | VLIB_BUFFER_DATA_SIZE | VMXNET3_RXF_BTYPE;
622 vmxnet3_rx_ring_advance_produce (rxq, ring);
627 vmxnet3_reg_write (vd, 0, VMXNET3_REG_RXPROD2, ring->produce);
632 #endif /* __included_vmnet_vmnet_h__ */
634 * fd.io coding-style-patch-verification: ON
637 * eval: (c-set-style "gnu")