2 * Copyright (c) 2015 Cisco and/or its affiliates.
3 * Licensed under the Apache License, Version 2.0 (the "License");
4 * you may not use this file except in compliance with the License.
5 * You may obtain a copy of the License at:
7 * http://www.apache.org/licenses/LICENSE-2.0
9 * Unless required by applicable law or agreed to in writing, software
10 * distributed under the License is distributed on an "AS IS" BASIS,
11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 * See the License for the specific language governing permissions and
13 * limitations under the License.
18 #include <vnet/ip/ip.h>
19 #include <vnet/crypto/crypto.h>
20 #include <vnet/ipsec/ipsec.h>
40 typedef CLIB_PACKED (struct {
43 }) ip4_and_esp_header_t;
47 typedef CLIB_PACKED (struct {
51 }) ip4_and_udp_and_esp_header_t;
55 typedef CLIB_PACKED (struct {
58 }) ip6_and_esp_header_t;
62 * AES counter mode nonce
68 u32 ctr; /* counter: 1 in big-endian for ctr, unused for gcm */
69 } __clib_packed esp_ctr_nonce_t;
71 STATIC_ASSERT_SIZEOF (esp_ctr_nonce_t, 16);
74 * AES GCM Additional Authentication data
76 typedef struct esp_aead_t_
79 * for GCM: when using ESN it's:
80 * SPI, seq-hi, seg-low
85 } __clib_packed esp_aead_t;
87 #define ESP_SEQ_MAX (4294967295UL)
88 #define ESP_MAX_BLOCK_SIZE (16)
89 #define ESP_MAX_IV_SIZE (16)
90 #define ESP_MAX_ICV_SIZE (32)
92 u8 *format_esp_header (u8 * s, va_list * args);
94 /* TODO seq increment should be atomic to be accessed by multiple workers */
96 esp_seq_advance (ipsec_sa_t * sa)
98 if (PREDICT_TRUE (ipsec_sa_is_set_USE_ESN (sa)))
100 if (PREDICT_FALSE (sa->seq == ESP_SEQ_MAX))
102 if (PREDICT_FALSE (ipsec_sa_is_set_USE_ANTI_REPLAY (sa) &&
103 sa->seq_hi == ESP_SEQ_MAX))
111 if (PREDICT_FALSE (ipsec_sa_is_set_USE_ANTI_REPLAY (sa) &&
112 sa->seq == ESP_SEQ_MAX))
121 esp_aad_fill (u8 * data, const esp_header_t * esp, const ipsec_sa_t * sa)
125 aad = (esp_aead_t *) data;
126 aad->data[0] = esp->spi;
128 if (ipsec_sa_is_set_USE_ESN (sa))
130 /* SPI, seq-hi, seq-low */
131 aad->data[1] = (u32) clib_host_to_net_u32 (sa->seq_hi);
132 aad->data[2] = esp->seq;
138 aad->data[1] = esp->seq;
143 /* Special case to drop or hand off packets for sync/async modes.
145 * Different than sync mode, async mode only enqueue drop or hand-off packets
149 esp_set_next_index (int is_async, u32 * from, u16 * nexts, u32 bi,
150 u16 * drop_index, u16 drop_next, u16 * next)
154 from[*drop_index] = bi;
155 nexts[*drop_index] = drop_next;
162 /* when submitting a frame is failed, drop all buffers in the frame */
164 esp_async_recycle_failed_submit (vnet_crypto_async_frame_t * f,
165 vlib_buffer_t ** b, u32 * from, u16 * nexts,
166 u16 * n_dropped, u16 drop_next_index,
169 u32 n_drop = f->n_elts;
170 u32 *bi = f->buffer_indices;
175 esp_set_next_index (1, from, nexts, bi[0], n_dropped, drop_next_index,
180 vnet_crypto_async_reset_frame (f);
184 * The post data structure to for esp_encrypt/decrypt_inline to write to
185 * vib_buffer_t opaque unused field, and for post nodes to pick up after
196 ipsec_sa_flags_t flags;
208 } esp_decrypt_packet_data_t;
210 STATIC_ASSERT_SIZEOF (esp_decrypt_packet_data_t, 3 * sizeof (u64));
211 STATIC_ASSERT_OFFSET_OF (esp_decrypt_packet_data_t, seq, sizeof (u64));
213 /* we are forced to store the decrypt post data into 2 separate places -
214 vlib_opaque and opaque2. */
218 u32 free_buffer_index;
220 } esp_decrypt_packet_data2_t;
225 esp_decrypt_packet_data_t decrypt_data;
228 STATIC_ASSERT (sizeof (esp_post_data_t) <=
229 STRUCT_SIZE_OF (vnet_buffer_opaque_t, unused),
230 "Custom meta-data too large for vnet_buffer_opaque_t");
232 #define esp_post_data(b) \
233 ((esp_post_data_t *)((u8 *)((b)->opaque) \
234 + STRUCT_OFFSET_OF (vnet_buffer_opaque_t, unused)))
236 STATIC_ASSERT (sizeof (esp_decrypt_packet_data2_t) <=
237 STRUCT_SIZE_OF (vnet_buffer_opaque2_t, unused),
238 "Custom meta-data too large for vnet_buffer_opaque2_t");
240 #define esp_post_data2(b) \
241 ((esp_decrypt_packet_data2_t *)((u8 *)((b)->opaque2) \
242 + STRUCT_OFFSET_OF (vnet_buffer_opaque2_t, unused)))
246 /* esp post node index for async crypto */
249 u32 esp4_tun_post_next;
250 u32 esp6_tun_post_next;
251 u32 esp_mpls_tun_post_next;
252 } esp_async_post_next_t;
254 extern esp_async_post_next_t esp_encrypt_async_next;
255 extern esp_async_post_next_t esp_decrypt_async_next;
257 #endif /* __ESP_H__ */
260 * fd.io coding-style-patch-verification: ON
263 * eval: (c-set-style "gnu")