We don't have (yet) 128-bit unaligned load/store on ARM

Change-Id: I16395bbf843e338cdd366d85bb4df3de95d9b265
Signed-off-by: Damjan Marion <damarion@cisco.com>

diff --git a/src/vppinfra/bitmap.h b/src/vppinfra/bitmap.h
index 9418b1f..574f4c1 100644 (file)
--- a/src/vppinfra/bitmap.h
+++ b/src/vppinfra/bitmap.h
@@ -386,7 +386,7 @@ clib_bitmap_first_set (uword * ai)
 {
   uword i = 0;
 #if uword_bits == 64
-#if defined (CLIB_HAVE_VEC256)
+#if defined(CLIB_HAVE_VEC256)
   while (i + 7 < vec_len (ai))
     {
       u64x4 v;
@@ -395,7 +395,7 @@ clib_bitmap_first_set (uword * ai)
        break;
       i += 8;
     }
-#elif defined (CLIB_HAVE_VEC128)
+#elif defined(CLIB_HAVE_VEC128) && defined(CLIB_HAVE_VEC128_UNALIGNED_LOAD_STORE)
   while (i + 3 < vec_len (ai))
     {
       u64x2 v;