dpdk_esp_encrypt: add to prefetch data 09/18409/3
authorZhiyong Yang <zhiyong.yang@intel.com>
Wed, 20 Mar 2019 07:35:39 +0000 (03:35 -0400)
committerDamjan Marion <dmarion@me.com>
Tue, 23 Apr 2019 07:13:46 +0000 (07:13 +0000)
The memory areas storing vlib_buffer_t and ip4|6_and_esp_header_t
are not prefetched. The patch help dpdk_esp_encrypt to reduce 18
clocks/pkt from 149 to 131 on Haswell when running IPsec in tunnel
mode.

Change-Id: I4f4e9e2b3982a4b7810cab8ed828a5e4631f8f8c
Signed-off-by: Zhiyong Yang <zhiyong.yang@intel.com>
src/plugins/dpdk/ipsec/esp_encrypt.c

index 908f846..653c158 100644 (file)
@@ -155,8 +155,8 @@ dpdk_esp_encrypt_inline (vlib_main_t * vm,
       while (n_left_from > 0 && n_left_to_next > 0)
        {
          clib_error_t *error;
-         u32 bi0;
-         vlib_buffer_t *b0 = 0;
+         u32 bi0, bi1;
+         vlib_buffer_t *b0, *b1;
          u32 sa_index0;
          ip4_and_esp_header_t *ih0, *oh0 = 0;
          ip6_and_esp_header_t *ih6_0, *oh6_0 = 0;
@@ -169,7 +169,7 @@ dpdk_esp_encrypt_inline (vlib_main_t * vm,
          u8 trunc_size;
          u16 rewrite_len;
          u16 udp_encap_adv = 0;
-         struct rte_mbuf *mb0 = 0;
+         struct rte_mbuf *mb0;
          struct rte_crypto_op *op;
          u16 res_idx;
 
@@ -188,6 +188,16 @@ dpdk_esp_encrypt_inline (vlib_main_t * vm,
          /* mb0 */
          CLIB_PREFETCH (mb0, CLIB_CACHE_LINE_BYTES, STORE);
 
+         if (n_left_from > 1)
+           {
+             bi1 = from[1];
+             b1 = vlib_get_buffer (vm, bi1);
+
+             CLIB_PREFETCH (b1, CLIB_CACHE_LINE_BYTES, LOAD);
+             CLIB_PREFETCH (b1->data - CLIB_CACHE_LINE_BYTES,
+                            CLIB_CACHE_LINE_BYTES, STORE);
+           }
+
          op = ops[0];
          ops += 1;
          ASSERT (op->status == RTE_CRYPTO_OP_STATUS_NOT_PROCESSED);