vppinfra: more AVX2 and AVX512 inlines

Change-Id: I81bd967a580ae3b476dfd731e9933a9898568a91
Signed-off-by: Damjan Marion <damarion@cisco.com>

diff --git a/src/vppinfra/vector_avx2.h b/src/vppinfra/vector_avx2.h
index c857ad4..482bdd5 100644 (file)
--- a/src/vppinfra/vector_avx2.h
+++ b/src/vppinfra/vector_avx2.h
@@ -132,6 +132,16 @@ _(i8x16, i64x4, epi8_epi64)
 #undef _
 /* *INDENT-ON* */
 
+static_always_inline u32x8
+u32x8_byte_swap (u32x8 v)
+{
+  u8x32 swap = {
+    3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12,
+    3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12
+  };
+  return (u32x8) _mm256_shuffle_epi8 ((__m256i) v, (__m256i) swap);
+}
+
 static_always_inline u16x16
 u16x16_byte_swap (u16x16 v)
 {
@@ -188,6 +198,9 @@ u32x8_from_f32x8 (f32x8 v)
   return (u32x8) _mm256_cvttps_epi32 ((__m256) v);
 }
 
+#define u32x8_blend(a,b,m) \
+  (u32x8) _mm256_blend_epi32 ((__m256i) a, (__m256i) b, m)
+
 #define u16x16_blend(v1, v2, mask) \
   (u16x16) _mm256_blend_epi16 ((__m256i) (v1), (__m256i) (v2), mask)
 
@@ -265,6 +278,19 @@ u8x32_blend (u8x32 v1, u8x32 v2, u8x32 mask)
 #define u64x4_permute_lanes(a, b, m) \
   (u64x4) _mm256_permute2x128_si256 ((__m256i) a, (__m256i) b, m)
 
+static_always_inline u32x8
+u32x8_min (u32x8 a, u32x8 b)
+{
+  return (u32x8) _mm256_min_epu32 ((__m256i) a, (__m256i) b);
+}
+
+static_always_inline u32
+u32x8_min_scalar (u32x8 v)
+{
+  return u32x4_min_scalar (u32x4_min (u32x8_extract_lo (v),
+                                     u32x8_extract_hi (v)));
+}
+
 static_always_inline void
 u32x8_transpose (u32x8 a[8])
 {

diff --git a/src/vppinfra/vector_avx512.h b/src/vppinfra/vector_avx512.h
index a5d6739..6fd27a3 100644 (file)
--- a/src/vppinfra/vector_avx512.h
+++ b/src/vppinfra/vector_avx512.h
@@ -69,6 +69,52 @@ u16x32_msb_mask (u16x32 v)
   return (u32) _mm512_movepi16_mask ((__m512i) v);
 }
 
+static_always_inline u32x16
+u32x16_byte_swap (u32x16 v)
+{
+  u8x64 swap = {
+    3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12,
+    3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12,
+    3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12,
+    3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12
+  };
+  return (u32x16) _mm512_shuffle_epi8 ((__m512i) v, (__m512i) swap);
+}
+
+static_always_inline u16x32
+u16x32_byte_swap (u16x32 v)
+{
+  u8x64 swap = {
+    1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14,
+    1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14,
+    1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14,
+    1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14
+  };
+  return (u16x32) _mm512_shuffle_epi8 ((__m512i) v, (__m512i) swap);
+}
+
+static_always_inline u32x8
+u32x16_extract_lo (u32x16 v)
+{
+  return (u32x8) _mm512_extracti64x4_epi64 ((__m512i) v, 0);
+}
+
+static_always_inline u32x8
+u32x16_extract_hi (u32x16 v)
+{
+  return (u32x8) _mm512_extracti64x4_epi64 ((__m512i) v, 1);
+}
+
+static_always_inline u32
+u32x16_min_scalar (u32x16 v)
+{
+  return u32x8_min_scalar (u32x8_min (u32x16_extract_lo (v),
+                                     u32x16_extract_hi (v)));
+}
+
+
+#define u32x16_ternary_logic(a, b, c, d) \
+  (u32x16) _mm512_ternarylogic_epi32 ((__m512i) a, (__m512i) b, (__m512i) c, d)
 
 static_always_inline void
 u32x16_transpose (u32x16 m[16])