u8x16_compare_byte_mask - optimize to use 128bit registers as suggested by Nintin

Change-Id: I88aabd34ef385d620695ac17ec3fe2f4a5177ada
Signed-off-by: Adrian Oanca <adrian.oanca@enea.com>

diff --git a/src/vppinfra/vector_neon.h b/src/vppinfra/vector_neon.h
index 6ca9c0b..331b8ed 100644 (file)
--- a/src/vppinfra/vector_neon.h
+++ b/src/vppinfra/vector_neon.h
@@ -49,30 +49,15 @@ u64x2_is_all_zero (u64x2 x)
 always_inline u32
 u8x16_compare_byte_mask (u8x16 x)
 {
-  static int8_t const __attribute__ ((aligned (16))) xr[8] =
-  {
-  -7, -6, -5, -4, -3, -2, -1, 0};
-  uint8x8_t mask_and = vdup_n_u8 (0x80);
-  int8x8_t mask_shift = vld1_s8 (xr);
-
-  uint8x8_t lo = vget_low_u8 (x);
-  uint8x8_t hi = vget_high_u8 (x);
-
-  lo = vand_u8 (lo, mask_and);
-  lo = vshl_u8 (lo, mask_shift);
-
-  hi = vand_u8 (hi, mask_and);
-  hi = vshl_u8 (hi, mask_shift);
-
-  lo = vpadd_u8 (lo, lo);
-  lo = vpadd_u8 (lo, lo);
-  lo = vpadd_u8 (lo, lo);
-
-  hi = vpadd_u8 (hi, hi);
-  hi = vpadd_u8 (hi, hi);
-  hi = vpadd_u8 (hi, hi);
-
-  return ((hi[0] << 8) | (lo[0] & 0xff));
+  uint8x16_t mask_shift =
+    { -7, -6, -5, -4, -3, -2, -1, 0, -7, -6, -5, -4, -3, -2, -1, 0 };
+  uint8x16_t mask_and = vdupq_n_u8 (0x80);
+  x = vandq_u8 (x, mask_and);
+  x = vshlq_u8 (x, vreinterpretq_s8_u8 (mask_shift));
+  x = vpaddq_u8 (x, x);
+  x = vpaddq_u8 (x, x);
+  x = vpaddq_u8 (x, x);
+  return vgetq_lane_u8 (x, 0) | (vgetq_lane_u8 (x, 1) << 8);
 }
 
 always_inline u32